參數(shù)資料
型號(hào)： SC80C451CGA68
廠商： NXP SEMICONDUCTORS
元件分類： 微控制器/微處理器
英文描述： 80C51 8-bit microcontroller family 4K/128 OTP/ROM/ROMless, expanded I/O
中文描述： 8-BIT, 16 MHz, MICROCONTROLLER, PQCC68
封裝： PEDESTAL, PLASTIC, MO-047AE, SOT-188-3, LCC-68
文件頁(yè)數(shù)： 13/22頁(yè)
文件大?。?/td> 162K
代理商： SC80C451CGA68
Philips Semiconductors
Product specification
80C451/83C451/87C451
80C51 8-bit microcontroller family
4K/128 OTP/ROM/ROMless, expanded I/O
1998 May 01
13
EXPLANATION OF THE AC SYMBOLS
Each timing symbol has five characters. The first character is always
‘t’ (= time). The other characters, depending on their positions,
indicate the name of a signal or the logical status of that signal. The
designations are:
A – Address
C – Clock
D – Input data
H – Logic level high
I
– Instruction (program memory contents)
L – Logic level low, or ALE
P – PSEN
Q – Output data
R – RD signal
t
– Time
V – Valid
W – WR signal
X – No longer a valid logic level
Z – Float
Examples:
t
AVLL
= Time for address valid to ALE low.
t
LLPL
= Time for ALE low to PSEN low.
t
PXIZ
ALE
PSEN
PORT 0
PORT 2
A0–A15
A8–A15
A0–A7
A0–A7
t
AVLL
t
PXIX
t
LLAX
INSTR IN
t
LHLL
t
PLPH
t
LLIV
t
PLAZ
t
LLPL
t
AVIV
SU00006
t
PLIV
Figure 2. External Program Memory Read Cycle
t
LLAX
ALE
PSEN
PORT 0
PORT 2
RD
A0–A7
FROM RI OR DPL
DATA IN
A0–A7 FROM PCL
INSTR IN
P2.0–P2.7 OR A8–A15 FROM DPH
A0–A15 FROM PCH
t
WHLH
t
LLDV
t
LLWL
t
RLRH
t
RLAZ
t
AVLL
t
RHDX
t
RHDZ
t
AVWL
t
AVDV
t
RLDV
SU00007
Figure 3. External Data Memory Read Cycle
相關(guān)PDF資料
PDF描述
SC83C451CGA68 80C51 8-bit microcontroller family 4K/128 OTP/ROM/ROMless, expanded I/O
SC87C451CGA68 80C51 8-bit microcontroller family 4K/128 OTP/ROM/ROMless, expanded I/O
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