參數(shù)資料
型號(hào)： SC2434TSTRT
廠商： Semtech Corporation
英文描述： TriPhase Current Mode Controller with Power Good
中文描述： 三相電流模式控制器與電源良好
文件頁(yè)數(shù)： 9/19頁(yè)
文件大小： 302K
代理商： SC2434TSTRT
9
2005 Semtech Corp.
www.semtech.com
POWER MANAGEMENT
Applications Information (Cont.)
SC2434
be caused by layout inductances, may alter the PWM
comparator trip point. The value of R
may have to be
adjusted to compensate for such parasitic effects.
It must be noted that the current amplifier gain is quite
precise, with greater than 80dB of Common Mode
Rejection Ratio (CMRR). Thus the droop accuracy is
primarily based upon external components tolerances. By
employing 1% current sensing element with very low
temperature coefficient, this topology is proved to be the
best comparing the schemes of using R
sensing and
using inductor winding resistance sensing. The accurate
drooping translates into minimum amount output bulk
capacitor needed to meet the voltage regulation specifica-
tions and the least system cost.
Programming The DC Level Of The Output Voltage
Kirchoff’s current law can be applied to the error
amplifier’s inverting input (see Fig. 1) to calculate R
,
the DC level setting resistor. For given output voltage set
point and VID setting, the resistance can be calculated
by:
Hp_ccms R
(
)
Gpwm
1
s C
Rc
.
1
s R
C
.
(
) 1
1.5
s
.
π
Fs
.
s
.
π
Fs
2
.
Fig. 4 - Loop gain and compensation of the current mode con-
troller.
where C
is the equivalent internal capacitor across the
error amplifier output and the inverting input with a value
of 11pF.
The power stage transfer function under continuous
conduction mode can be approximated by:
where N
is the number of VID steps down from the
highest set point (VID=00000). For example, when VID
[4:1]=00100, N
= 4. V
is the error amplifier
output voltage and, as a first approximation, it is equal to
1..7V. Again, V
= Precision Reference Voltage = 1.5V.
The final value of R
may need to be fine tuned
experimentally after the droop resistor has been chosen.
Control Loop Compensation
The current mode control yields a power supply easy to
compensate because the power stage has first order (single
pole) behavior. The SC2434 provides internal slope
compensation to avoid sub harmonic oscillation of the
current loop. The added ramp signal has 300mV peak-to-
peak amplitude and the ramp frequency is as same as
the oscillator frequency.
As depicted in Fig. 4, the gain for the voltage feedback
loop can be expressed as a product of the power stage
gain and the compensator gain:
Loop s R
(
)
Hp_ccms R
(
) Hcs )
0
-
+
Err_Amp
Verror
Loop Gain
Copam
Ccomp
Rcomp
-1
Ccomp
1/(R*C)
Rdrp
POWER
STAGE
Rdrp/Rfb
Vin/(VR*Nphase)
-1
Power Stage
Compensator
1/(ESRC)
Pole
Fsw/2
Zero
0dB
Fsw/2
-2
-2
1/(R*C)
Vout
where G
is the low frequency gain of the power stage.
The power stage has an ESR zero, a dominant pole at
low frequency, and a pair of complex pole located at one
half of the switching frequency. The parameter used here
are defined as below:
C = output bulk capacitance
R = load resistance
R
C
= ESR of output bulk capacitor
F
SW
= switching frequency
The PWM gain is defined as:
Ros
Vbg
Vset
Vbg
RFB
Veo
Vbg
Rdrp
NDAC_STEPIDAC_LSB
G
pw m
R
!
N
R
sense·
G
C A
phase
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