參數(shù)資料
型號： SC16C852LIB
廠商： NXP Semiconductors N.V.
元件分類： 收發(fā)器
英文描述： 1.8 V dual UART, 5 Mbit-s (max.) with 128-byte FIFOs, infrared (IrDA) and 16 mode or 68 mode bus interface
封裝： SC16C852LIB<SOT313-2 (LQFP48)|<<http://www.nxp.com/packages/SOT313-2.html<1<Always Pb-free,;SC16C852LIB<SOT313-2 (LQFP48)|<<http://www.nxp.com/packages/SOT313-2.html<1
文件頁數(shù)： 43/64頁
文件大?。?/td> 1160K
代理商： SC16C852LIB
SC16C852L
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 4 — 1 February 2011
43 of 64
NXP Semiconductors
SC16C852L
1.8 V dual UART with 128-byte FIFOs and IrDA encoder/decoder
10. Dynamic characteristics
[1]
Applies to external clock, crystal oscillator max 24 MHz.
[2]
Maximum frequency =
[3]
10 % of the data bus output voltage level.
[4]
RCLK is an internal signal derived from Divisor Latch LSB (DLL) and Divisor Latch MSB (DLM) divisor latches.
Table 39.
T
amb
=
40
C to +85
C; V
DD
= 1.65 V to 1.95 V; unless otherwise specified.
Symbol
Parameter
t
WH
pulse width HIGH
t
WL
pulse width LOW
t
w(clk)
clock pulse width
f
XTAL1
frequency on pin XTAL1
t
su(A)
address setup time
t
h(A)
address hold time
t
d(CS-IOR)
delay time from CS to IOR
t
d(IOW-TXRDYH)
delay time from IOW to TXRDY HIGH
t
d(IOR-RXRDYH)
delay time from IOR to RXRDY HIGH
t
d(stop-RXRDY)
delay time from stop to RXRDY
t
d(start-TXRDY)
delay time from start to TXRDY
t
w(IOR)
IOR pulse width time
t
h(IOR-CS)
hold time from IOR to chip select
t
d(IOR)
IOR delay time
t
d(IOR-Q)
delay time from IOR to data output
t
dis(IOR-QZ)
disable time from IOR to high-impedance
data output
[3]
t
d(CSL-IOWL)
delay time from CS LOW to IOW LOW
t
w(IOW)
IOW pulse width time
t
h(IOW-CS)
hold time from IOW to CS
t
d(IOW)
IOW delay time
t
su(D-IOWH)
setup time from data input to IOW HIGH
t
h(IOWH-D)
data input hold time after IOW HIGH
t
d(IOW-Q)
delay time from IOW to data output
t
d(modem-INT)
delay time from modem to INT
t
d(IOR-INTL)
delay time from IOR to INT LOW
t
d(stop-INT)
delay time from stop to INT
t
d(start-INT)
delay time from start to INT
t
d(IOW-TX)
delay time from IOW to TX
t
d(IOW-INTL)
delay time from IOW to INT LOW
t
w(RESET)
pulse width on pin RESET
N
baud rate divisor
Dynamic characteristics - Intel or 16 mode
Conditions
Min
6
6
12.5
Typ
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Max
-
-
-
80
-
-
-
50
50
1T
RCLK
8T
RCLK
-
-
-
40
20
Unit
ns
ns
ns
MHz
ns
ns
ns
ns
ns
s
s
ns
ns
ns
ns
ns
[1][2]
-
0
10
5
-
-
[4]
-
[4]
-
20
0
10
-
-
25 pF load
25 pF load
5
10
0
10
5
5
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
50
50
50
1T
RCLK
1T
RCLK
24T
RCLK
50
-
(2
16
1)
ns
ns
ns
ns
ns
ns
ns
ns
ns
s
s
s
ns
ns
25 pF load
25 pF load
25 pF load
25 pF load
25 pF load
25 pF load
25 pF load
[4]
-
-
[4]
8T
RCLK
-
10
1
t
w clk
--------------
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
SC16C852LIB,128 功能描述:UART 接口集成電路 1.8V 2 CH UART 128B RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel
SC16C852LIB,151 功能描述:UART 接口集成電路 UART 2-CH 128Byte FIFO 1.8V RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel
SC16C852LIB,157 功能描述:UART 接口集成電路 1.8V 2 CH UART 128B RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel
SC16C852LIB-F 功能描述:UART 接口集成電路 1.8V 2 CH UART 128B FIFO RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel
SC16C852LIBS 功能描述:UART 接口集成電路 1.8V 2 CH UART 128B FIFO RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel
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