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參數(shù)資料
| 型號： | SC16C754BIBM,128 |
| 廠商： | NXP Semiconductors |
| 文件頁數(shù)： | 26/50頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC UART QUAD 64BYTE 64LQFP |
| 標準包裝： | 2,000 |
| 通道數(shù)： | 4，QUART |
| FIFO's： | 64 字節(jié) |
| 電源電壓： | 2.5V，3.3V，5V |
| 帶自動流量控制功能： | 是 |
| 帶故障啟動位檢測功能： | 是 |
| 帶調(diào)制解調(diào)器控制功能： | 是 |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 64-LQFP |
| 供應(yīng)商設(shè)備封裝： | 64-LQFP（7x7） |
| 包裝： | 帶卷 (TR) |
| 其它名稱： | 935279069128 SC16C754BIBM-F SC16C754BIBM-F-ND |
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SC16C754B_4
NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 04 — 6 October 2008
32 of 51
NXP Semiconductors
SC16C754B
5 V, 3.3 V and 2.5 V quad UART, 5 Mbit/s (max.) with 64-byte FIFOs
7.12 Transmission Control Register (TCR)
This 8-bit register is used to store the RX FIFO threshold levels to stop/start transmission
during hardware/software ow control. Table 20 shows transmission control register bit
settings.
TCR trigger levels are available from 0 to 60 bytes with a granularity of four.
Remark: TCR can only be written to when EFR[4] = 1 and MCR[6] = 1. The programmer
must program the TCR such that TCR[3:0] > TCR[7:4]. There is no built-in hardware
check to make sure this condition is met. Also, the TCR must be programmed with this
condition before auto-RTS or software ow control is enabled to avoid spurious operation
of the device.
7.13 Trigger Level Register (TLR)
This 8-bit register is used to store the transmit and received FIFO trigger levels used for
DMA and interrupt generation. Trigger levels from 4 to 60 can be programmed with a
granularity of 4. Table 21 shows trigger level register bit settings.
Remark: TLR can only be written to when EFR[4] = 1 and MCR[6] = 1. If TLR[3:0] or
TLR[7:4] are logic 0, the selectable trigger levels via the FIFO Control Register (FCR) are
used for the transmit and receive FIFO trigger levels. Trigger levels from 4 to 60 bytes are
available with a granularity of four. The TLR should be programmed for N
4, where N is the
desired trigger level.
7.14 FIFO Ready register (FIFO Rdy)
The FIFO Rdy register provides real-time status of the transmit and receive FIFOs of both
channels.
Table 20.
Transmission control register bits description
Bit
Symbol
Description
7:4
TCR[7:4]
RX FIFO trigger level to resume transmission [(0 to 60) bytes].
3:0
TCR[3:0]
RX FIFO trigger level to halt transmission [(0 to 60) bytes].
Table 21.
Trigger level register bits description
Bit
Symbol
Description
7:4
TLR[7:4]
RX FIFO trigger levels (4 to 60), number of characters available.
3:0
TLR[3:0]
TX FIFO trigger levels (4 to 60), number of spaces available.
Table 22.
FIFO ready register bits description
Bit
Symbol
Description
7:4
FIFO Rdy[7:4]
0 = there are less than a RX trigger level number of characters in the
RX FIFO
1 = the RX FIFO has more than a RX trigger level number of characters
available for reading or a time-out condition has occurred
3:0
FIFO Rdy[3:0]
0 = there are less than a TX trigger level number of spaces available in
the TX FIFO
1 = there are at least a TX trigger level number of spaces available in the
TX FIFO
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SC16C754BIBM-F | 功能描述:UART 接口集成電路 16CB 2.5V-5V 4CH UART 64B FIFO RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
| SC16C754BIBM-S | 功能描述:UART 接口集成電路 16CB 2.5V-5V 4CH UART 64B FIFO RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
| SC16C754IA68 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Quad UART with 64-byte FIFO |
| SC16C754IA68,512 | 功能描述:UART 接口集成電路 16C 2.5V-5V 4CH UART 64B FIFO RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
| SC16C754IA68,518 | 功能描述:UART 接口集成電路 16C 2.5V-5V 4CH UART 64B FIFO RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
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