參數(shù)資料
型號(hào): SC16C654IB64
廠商: NXP SEMICONDUCTORS
元件分類: 微控制器/微處理器
英文描述: Quad UART with 64-byte FIFO and infrared (IrDA) encoder/decoder
中文描述: 4 CHANNEL(S), 5M bps, SERIAL COMM CONTROLLER, PQFP64
封裝: 10 X 10 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT-314-2, LQFP-64
文件頁(yè)數(shù): 24/52頁(yè)
文件大?。?/td> 647K
代理商: SC16C654IB64
Philips Semiconductors
SC16C654/654D
Quad UART with 64-byte FIFO and infrared (IrDA) encoder/decoder
Product data
Rev. 04 — 19 June 2003
24 of 52
9397 750 11617
Koninklijke Philips Electronics N.V. 2003. All rights reserved.
Transmit operation in mode ‘1’:
When the SC16C654/654D is in FIFO
mode (FCR[0] = logic 1; FCR[3] = logic 1), the TXRDY pin will be a
logic 1 when the transmit FIFO is completely full. It will be a logic 0 when
the trigger level has been reached.
Receive operation in mode ‘1’:
When the SC16C654/654D is in FIFO
mode (FCR[0] = logic 1; FCR[3] = logic 1) and the trigger level has been
reached, or a Receive Time-Out has occurred, the RXRDY pin will go to
a logic 0. Once activated, it will go to a logic 1 after there are no more
characters in the FIFO.
XMIT FIFO reset.
Logic 0 = No FIFO transmit reset (normal default condition).
Logic 1 = Clears the contents of the transmit FIFO and resets the
FIFO counter logic (the transmit shift register is not cleared or
altered). This bit will return to a logic 0 after clearing the FIFO.
RCVR FIFO reset.
Logic 0 = No FIFO receive reset (normal default condition).
Logic 1 = Clears the contents of the receive FIFO and resets the FIFO
counter logic (the receive shift register is not cleared or altered). This
bit will return to a logic 0 after clearing the FIFO.
FIFO enable.
Logic 0 = Disable the transmit and receive FIFO (normal default
condition).
Logic 1 = Enable the transmit and receive FIFO.
This bit must be a
‘1’ when other FCR bits are written to, or they will not be
programmed.
2
FCR[2]
1
FCR[1]
0
FCR[0]
Table 11:
FCR[7]
0
0
1
1
RCVR trigger levels
FCR[6]
0
1
0
1
RX FIFO trigger level
08
16
56
60
Table 12:
FCR[5]
0
0
1
1
TX trigger levels
FCR[4]
0
1
0
1
TX FIFO trigger level (# of characters)
08
16
32
56
Table 10:
Bit
FIFO Control Register bits description
…continued
Symbol
Description
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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SC16C654IB64,151 功能描述:UART 接口集成電路 16C 2.5V-5V 4CH UART 64B FIFO RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel
SC16C654IB64,157 功能描述:UART 接口集成電路 16C 2.5V-5V 4CH UART 64B FIFO RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel
SC16C750 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Universal Asynchronous Receiver/Transmitter (UART) with 64-byte FIFO
SC16C750B 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:5 V, 3.3 V and 2.5 V UART with 64-byte FIFOs