參數(shù)資料
型號: SC16C652BIBS
廠商: NXP Semiconductors N.V.
元件分類: 收發(fā)器
英文描述: 5 V, 3.3 V and 2.5 V dual UART, 5 Mbit-s (max.) with 32-byte FIFOs and infrared (IrDA) encoder-decoder
封裝: SC16C652BIB48<SOT313-2 (LQFP48)|<<http://www.nxp.com/packages/SOT313-2.html<1<Always Pb-free,;SC16C652BIB48<SOT313-2 (LQFP48)|<<http://www.nxp.com/packages/SOT313-2.html&
文件頁數(shù): 27/43頁
文件大小: 210K
代理商: SC16C652BIBS
SC16C652B_4
Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 04 — 1 September 2005
27 of 43
Philips Semiconductors
SC16C652B
Dual UART with 32-byte FIFOs and IrDA encoder/decoder
8.
Limiting values
9.
Static characteristics
[1]
Except XTAL2, V
OL
= 1 V typical.
Sleep current might be higher if there is any activity on the UART data bus during Sleep mode.
[2]
Table 27:
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
Parameter
V
CC
supply voltage
V
n
voltage at any pin
T
amb
ambient temperature
T
stg
storage temperature
P
tot(pack)
total power dissipation per package
Limiting values
Conditions
Min
-
GND
0.3
40
65
-
Max
7
V
CC
+ 0.3
+85
+150
500
Unit
V
V
°
C
°
C
mW
operating in free air
Table 28:
T
amb
=
40
°
C to +85
°
C; tolerance of V
CC
=
±
10 %; unless otherwise specified.
Symbol
Parameter
Static characteristics
Conditions
V
CC
= 2.5 V
Min
0.3
1.8
0.3
V
CC
= 3.3 V
Min
0.3
2.4
0.3
V
CC
= 5.0 V
Min
0.5
3.0
0.5
Unit
Max
0.45
V
CC
0.65
Max
0.6
V
CC
0.8
Max
0.6
V
CC
0.8
V
IL(CK)
V
IH(CK)
V
IL
LOW-level clock input voltage
HIGH-level clock input voltage
LOW-level input voltage
(except X1 clock)
HIGH-level input voltage
(except X1 clock)
LOW-level output voltage on all
outputs
[1]
V
V
V
V
IH
1.6
-
2.0
-
2.2
-
V
V
OL
I
OL
= 5 mA
(databus)
I
OL
= 4 mA
(other outputs)
I
OL
= 2 mA
(databus)
I
OL
= 1.6 mA
(other outputs)
I
OH
=
5 mA
(databus)
I
OH
=
1 mA
(other outputs)
I
OH
=
800
μ
A
(data bus)
I
OH
=
400
μ
A
(other outputs)
-
-
-
-
-
0.4
V
-
-
-
0.4
-
-
V
-
0.4
-
-
-
-
V
-
0.4
-
-
-
-
V
V
OH
HIGH-level output voltage
-
-
-
-
2.4
-
V
-
-
2.0
-
-
-
V
1.85
-
-
-
-
-
V
1.85
-
-
-
-
-
V
I
LIL
I
CL
I
CC
I
CCsleep
C
i
LOW-level input leakage current
clock leakage current
supply current
sleep current
input capacitance
-
-
-
-
-
±
10
±
30
3.5
50
5
-
-
-
-
-
±
10
±
30
4.5
50
5
-
-
-
-
-
±
10
±
30
4.5
50
5
μ
A
μ
A
mA
μ
A
pF
f = 5 MHz
[2]
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