參數(shù)資料
型號: SC16C650B
廠商: NXP Semiconductors N.V.
英文描述: 5 V, 3.3 V and 2.5 V UART with 32-byte FIFOs and infrared (IrDA) encoder/decoder
中文描述: 5伏,3.3伏和2.5伏的UART與32字節(jié)的FIFO和紅外線(IrDA)編碼器/解碼器
文件頁數(shù): 12/51頁
文件大小: 881K
代理商: SC16C650B
Philips Semiconductors
SC16C650B
UART with 32-byte FIFOs and IrDA encoder/decoder
Product data
Rev. 03 — 10 December 2004
12 of 51
9397 750 14451
Koninklijke Philips Electronics N.V. 2004. All rights reserved.
a time-out function to ensure data is delivered to the external CPU. An interrupt is
generated whenever the Receive Holding Register (RHR) has not been read
following the loading of a character or the receive trigger level has not been reached.
6.3 Hardware flow control
When automatic hardware flow control is enabled, the SC16C650B monitors the CTS
pin for a remote buffer overflow indication and controls the RTS pin for local buffer
overflows. Automatic hardware flow control is selected by setting EFR[6] (RTS) and
EFR[7] (CTS) to a logic 1. If CTS transitions from a logic 0 to a logic 1 indicating a
flow control request, ISR[5] will be set to a logic 1 (if enabled via IER[6,7]), and the
SC16C650B will suspend TX transmissions as soon as the stop bit of the character in
process is shifted out. Transmission is resumed after the CTS input returns to a
logic 0, indicating more data may be sent.
With the Auto-RTS function enabled, an interrupt is generated when the receive FIFO
reaches the programmed trigger level. The RTS pin will not be forced to a logic 1
(RTS off), until the receive FIFO reaches the next trigger level. However, the RTS pin
will return to a logic 0 after the data buffer (FIFO) is unloaded to the next trigger level
below the programmed trigger level. However, under the above described conditions,
the SC16C650B will continue to accept data until the receive FIFO is full.
6.4 Software flow control
When software flow control is enabled, the SC16C650B compares one or two
sequential receive data characters with the programmed Xon or Xoff character
value(s). If received character(s) match the programmed Xoff values, the
SC16C650B will halt transmission (TX) as soon as the current character(s) has
completed transmission. When a match occurs, the receive ready (if enabled via Xoff
IER[5]) flags will be set and the interrupt output pin (if receive interrupt is enabled) will
be activated. Following a suspension due to a match of the Xoff characters’ values,
the SC16C650B will monitor the receive data stream for a match to the Xon1,2
character value(s). If a match is found, the SC16C650B will resume operation and
clear the flags (ISR[4]).
Reset initially sets the contents of the Xon/Xoff 8-bit flow control registers to a logic 0.
Following reset, the user can write any Xon/Xoff value desired for software flow
control. Different conditions can be set to detect Xon/Xoff characters and
suspend/resume transmissions. When double 8-bit Xon/Xoff characters are selected,
the SC16C650B compares two consecutive receive characters with two software flow
control 8-bit values (Xon1, Xon2, Xoff1, Xoff2) and controls TX transmissions
accordingly. Under the above described flow control mechanisms, flow control
Table 4:
Selected trigger level
(characters)
8
16
24
28
Flow control mechanism
INT pin activation
Negate RTS or
send Xoff
8
16
24
28
Assert RTS or
send Xon
0
7
15
23
8
16
24
28
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SC16C650BIA44,512 功能描述:UART 接口集成電路 16CB 2.5V-5V 1CH RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel
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SC16C650BIA44-S 功能描述:UART 接口集成電路 16CB 2.5V-5V 1CH UART 32B FIFO RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel