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| 型號： | SC16C650AIB48 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | Universal Asynchronous Receiver/Transmitter (UART) with 32-byte FIFO and infrared (IrDA) encoder/decoder |
| 中文描述： | 1 CHANNEL(S), 3M bps, SERIAL COMM CONTROLLER, PQFP48 |
| 封裝： | 7 X 7 MM, 1.40 MM, PLASTIC, MS-026, SOT-313-2, LQFP-48 |
| 文件頁數(shù)： | 23/50頁 |
| 文件大小： | 642K |
| 代理商： | SC16C650AIB48 |
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Philips Semiconductors
SC16C650A
UART with 32-byte FIFO and IrDA encoder/decoder
Product data
Rev. 04 — 20 June 2003
23 of 50
9397 750 11622
Koninklijke Philips Electronics N.V. 2003. All rights reserved.
7.5 Line Control Register (LCR)
The Line Control Register is used to specify the asynchronous data communication
format. The word length, the number of stop bits, and the parity are selected by
writing the appropriate bits in this register.
[1]
When LCR[7] = 1, the general register set cannot be accessed until LCR[7] = 0.
Table 15:
Bit
7
Line Control Register bits description
Symbol
Description
LCR[7]
[1]
Divisor latch enable. The internal baud rate counter latch and Enhance
Feature mode enable.
Logic 0 = Divisor latch disabled (normal default condition).
Logic 1 = Divisor latch and enhanced feature register enabled.
LCR[6]
Set break. When enabled, the Break control bit causes a break condition
to be transmitted (the TX output is forced to a logic 0 state). This
condition exists until disabled by setting LCR[6] to a logic 0.
Logic 0 = no TX break condition (normal default condition).
Logic 1 = forces the transmitter output (TX) to a logic 0 for alerting the
remote receiver to a line break condition.
LCR[5]
Set parity. If the parity bit is enabled, LCR[5] selects the forced parity
format. Programs the parity conditions (see
Table 16
).
Logic 0 = parity is not forced (normal default condition).
LCR[5] = logic 1 and LCR[4] = logic 0: parity bit is forced to a logical 1
for the transmit and receive data.
LCR[5] = logic 1 and LCR[4] = logic 1: parity bit is forced to a logical 0
for the transmit and receive data.
LCR[4]
Even parity. If the parity bit is enabled with LCR[3] set to a logic 1,
LCR[4] selects the even or odd parity format.
Logic 0 = ODD Parity is generated by forcing an odd number of
logic 1s in the transmitted data. The receiver must be programmed to
check the same format (normal default condition).
Logic 1 = EVEN Parity is generated by forcing an even number of
logic 1s in the transmitted data. The receiver must be programmed to
check the same format.
LCR[3]
Parity enable. Parity or no parity can be selected via this bit.
Logic 0 = no parity (normal default condition).
Logic 1 = a parity bit is generated during the transmission, receiver
checks the data and parity for transmission errors.
LCR[2]
Stop bits. The length of stop bit is specified by this bit in conjunction with
the programmed word length (see
Table 17
).
Logic 0 or cleared = default condition.
LCR[1-0]
Word length bits 1, 0. These two bits specify the word length to be
transmitted or received (see
Table 18
).
Logic 0 or cleared = default condition.
6
5
4
3
2
1-0
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| SC16C650AIB48,128 | 功能描述:UART 接口集成電路 16C 2.5V-5V 1CH UART 32B FIFO RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
| SC16C650AIB48,151 | 功能描述:UART 接口集成電路 16C 2.5V-5V 1CH UART 32B FIFO RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
| SC16C650AIB48,157 | 功能描述:UART 接口集成電路 16C 2.5V-5V 1CH UART 32B FIFO RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
| SC16C650AIN40 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Universal Asynchronous Receiver/Transmitter (UART) with 32-byte FIFO and infrared (IrDA) encoder/decoder |
| SC16C650AIN40,112 | 功能描述:IC UART SINGLE W/FIFO 40-DIP RoHS:是 類別:集成電路 (IC) >> 接口 - UART（通用異步接收器/發(fā)送器） 系列:- 標準包裝:250 系列:- 特點:* 通道數(shù):2，DUART FIFO's:16 字節(jié) 規(guī)程:RS232，RS485 電源電壓:2.25 V ~ 5.5 V 帶并行端口:- 帶自動流量控制功能:是 帶IrDA 編碼器/解碼器:是 帶故障啟動位檢測功能:是 帶調(diào)制解調(diào)器控制功能:是 帶CMOS:是 安裝類型:表面貼裝 封裝/外殼:48-TQFP 供應商設備封裝:48-TQFP（7x7） 包裝:托盤 其它名稱:XR16L2551IM-F-ND |
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