參數(shù)資料
型號: SC16C550BIBS,157
廠商: NXP Semiconductors
文件頁數(shù): 25/48頁
文件大?。?/td> 0K
描述: IC UART SOT617-1
標(biāo)準(zhǔn)包裝: 2,450
特點: 可編程
通道數(shù): 1,UART
FIFO's: 16 字節(jié)
電源電壓: 2.5V,3.3V,5V
帶自動流量控制功能:
帶故障啟動位檢測功能:
帶調(diào)制解調(diào)器控制功能:
帶CMOS:
安裝類型: 表面貼裝
封裝/外殼: 32-VFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 32-HVQFN(5x5)
包裝: 托盤
其它名稱: 935279497157
SC16C550BIBS
SC16C550BIBS-ND
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SC16C550B_5
NXP
B
.V
.2008.
All
r
ights
reser
v
ed.
Pr
oduct
data
sheet
Re
v
.05
1
October
2008
31
of
48
NXP
Semiconductor
s
SC16C550B
5
V
,3.3
V
and
2.5
V
U
A
R
T
with
16-b
yte
FIFOs
[1]
Applies to external clock, crystal oscillator max 24 MHz.
[2]
Maximum frequency =
[3]
Applicable only when AS is tied LOW.
[4]
RESET pulse must happen when these signals are inactive: CS0 or CS1 or CS2 or CS, and IOW, IOR.
t20d
delay from stop to set interrupt
-
1TRCLK
-1TRCLK
s
t21d
delay from IOR to reset interrupt
25 pF load
-
100
-
29
-
28
ns
t22d
delay from start to set interrupt
-
100
-
45
-
40
ns
t23d
delay from IOW to transmit start
8TRCLK
24TRCLK
8TRCLK
24TRCLK
8TRCLK
24TRCLK
s
t24d
delay from IOW to reset interrupt
-
100
-
45
-
40
ns
t25d
delay from stop to set RXRDY-
1TRCLK
-1TRCLK
s
t26d
delay from IOR to reset RXRDY
-
100
-
45
-
40
ns
t27d
delay from IOW to set TXRDY
-
100
-
45
-
40
ns
t28d
delay from start to reset TXRDY-
8TRCLK
-8TRCLK
s
tRESET
RESET pulse width
[4] 100
-
40
-
40
-
ns
N
baud rate divisor
1
216
11
216
11
216
1
Table 26.
Dynamic characteristics …continued
Tamb = 40 °C to +85 °C; tolerance of VDD ± 10 %, unless otherwise specied.
Symbol
Parameter
Conditions
VDD = 2.5 V
VDD = 3.3 V
VDD = 5.0 V
Unit
Min
Max
Min
Max
Min
Max
1
t
w3
-------
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