參數(shù)資料
型號: SC1453ITSK-2.7TR
元件分類: 固定正電壓單路輸出LDO穩(wěn)壓器
英文描述: 2.7 V FIXED POSITIVE LDO REGULATOR, 0.23 V DROPOUT, PDSO5
封裝: MO-193AB, TSOT-23, 5 PIN
文件頁數(shù): 12/14頁
文件大?。?/td> 244K
代理商: SC1453ITSK-2.7TR
7
2006 Semtech Corp.
www.semtech.com
POWER MANAGEMENT
SC1453
Applications Information (Cont.)
Inserting these values into equation (2) gives us:
()
mW
108
150
.
0
744
.
2
465
.
3
P
)
MAX
(
D
=
=
Using this figure, we can calculate the maximum thermal
impedance allowable to maintain T
J ≤ 125°C:
() ()
W
/
C
370
108
.
0
85
125
P
T
)
MAX
(
D
)
MAX
(
A
)
MAX
(
J
)
MAX
(
JA
°
=
=
=
θ
With the standard SOT-23-5/TSOT-23-5 Land Pattern
shown at the end of this datasheet, and minimum trace
widths, the thermal impedance junction to ambient for
SC1453ISK is 256°C/W. Thus no additional heatsinking
is required for this example.
The junction temperature can be reduced further (or
higher power dissipation can be allowed) by the use of
larger trace widths and connecting PCB copper to the
GND pin (pin 2), which connects directly to the device
substrate. Adding approximately one square inch of PCB
copper to pin 2 will reduce
θ
JA to approximately
130°C/W and T
J(MAX)
for the example above to
approximately 100°C for the SOT-23-5 package. The use
of multi layer boards with internal ground/power planes
will lower the junction temperature and improve overall
output voltage accuracy.
Layout Considerations
While layout for linear devices is generally not as critical
as for a switching application, careful attention to detail
will ensure reliable operation.
1) Attaching the part to a larger copper footprint will
enable better heat transfer from the device, especially
on PCBs where there are internal ground and power
planes.
2) Place the input, output and bypass capacitors close
to the device for optimal transient response and device
behaviour.
3) Connect all ground connections directly to the ground
plane. If there is no ground plane, connect to a common
local ground point before connecting to board ground.
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