
SCES340D SEPTEMBER 2000 REVISED DECEMBER 2004
1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
2-V to 5.5-V V
CC
Operation
Max t
pd
of 6 ns at 5 V
Typical V
OLP
(Output Ground Bounce)
<0.8 V at V
CC
= 3.3 V, T
A
= 25
°
C
Typical V
OHV
(Output V
OH
Undershoot)
>2.3 V at V
CC
= 3.3 V, T
A
= 25
°
C
I
off
Supports Partial-Power-Down Mode
Operation
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
ESD Protection Exceeds JESD 22
2000-V Human-Body Model (A114-A)
200-V Machine Model (A115-A)
1000-V Charged-Device Model (C101)
description/ordering information
These dual 4-input positive-AND gates are
designed for 2-V to 5.5-V V
CC
operation.
The ’LV21A devices perform the Boolean function
Y
A
B
C
D or
Y
positive logic.
A
B
C
D in
These
partial-power-down applications using I
off
. The I
off
circuitry
disables
the
damaging current backflow through the devices
when they are powered down.
devices
are
fully
specified
for
outputs,
preventing
ORDERING INFORMATION
TA
PACKAGE
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
SOIC D
Tube of 50
SN74LV21AD
LV21A
Reel of 2500
SN74LV21ADR
SOP NS
Reel of 2000
SN74LV21ANSR
74LV21A
40
C to 85
C
°
°
SSOP DB
Reel of 2000
SN74LV21ADBR
LV21A
Tube of 90
SN74LV21APW
TSSOP PW
Reel of 2000
SN74LV21APWR
LV21A
Reel of 250
SN74LV21APWT
TVSOP DGV
Reel of 2000
SN74LV21ADGVR
LV21A
CDIP J
Tube of 25
SNJ54LV21AJ
SNJ54LV21AJ
55 C to 125 C
CFP W
LCCC FK
Tube of 150
Tube of 55
SNJ54LV21AW
SNJ54LV21AFK
SNJ54LV21AW
SNJ54LV21AFK
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design
guidelines are available at www.ti.com/sc/package.
Copyright
2004, Texas Instruments Incorporated
SN54LV21A . . . FK PACKAGE
(TOP VIEW)
SN54LV21A . . . J OR W PACKAGE
SN74LV21A . . . D, DB, DGV, NS, OR PW PACKAGE
(TOP VIEW)
NC No internal connection
1
2
3
4
5
6
7
14
13
12
11
10
9
8
1A
1B
NC
1C
1D
1Y
GND
V
CC
2D
2C
NC
2B
2A
2Y
3
2 1 20 19
9 10 11 12 13
4
5
6
7
8
18
17
16
15
14
2C
NC
NC
NC
2B
NC
NC
1C
NC
1D
1
1
N
2
2
V
2
1
G
N
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
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