參數(shù)資料
型號(hào)： SAH-XC2387C-200F100L
廠商： INFINEON TECHNOLOGIES AG
元件分類： 微控制器/微處理器
英文描述： 32-BIT, FLASH, 100 MHz, RISC MICROCONTROLLER, PQFP144
封裝： 0.50 MM PITCH, GREEN, PLASTIC, LQFP-144
文件頁數(shù)： 41/147頁
文件大?。?/td> 1798K
代理商： SAH-XC2387C-200F100L
XC2387C, XC2388C
XC2000 Family Derivatives / High Line
Electrical Parameters
Data Sheet
135
V1.2, 2010-09
4.7.7
FlexRay Interface Timing
The following parameters are applicable to the FlexRay channels.
Note: These parameters are not subject to production test but verified by design and/or
characterization.
Note: Operating Conditions apply.
Table 38
ERAY FlexRay Interface Timing
Parameter
Symbol
Values
Unit
Note /
Test Condition
Min.
Typ.
Max.
Time span from last BSS
to FES without the
influence of quartz
tolerance (d10Bit_TX)
1)
1) PLL jitter included.
t
60 CC
997.75
1002.2
5
ns
f
OSCDD=20MH
z;
C
L≤ 25 pF
TxD data valid from
fsample flip flop txd_reg
=> TxDA, TxDB
(dTxAsym)
2)3)
2) Refers to delays caused by the asymmetries of the output drivers of the digital logic and the GPIO pad drivers.
Quartz tolerance and PLL jitter are not included.
3) TxD output drivers have an asymmetry of rising and falling edges of |
t
F - tR| ≤ 1 ns.
t
61_minus_
t62 CC
1.5
ns
C
L≤ 25 pF
Time span between last
BSS and FES without
influence of quartz
tolerance (d10Bit_RX)
1)4)
4) Valid for output slopes of the Bus Driver of dRxSlope
≤ 5 ns at C
L = 15pF, 20% x VDDP to 80% x VDDP, according
to the FlexRay Electrical Physical Layer Specification V2.1 B.
t
63 SR
966.5
1046.0 ns
f
OSCDD=20MH
z
RxD capture by fsample
(RxDA/RxDB =>
sampling flip-flop)
(dRxAsym)
t
64_minus_
t65 CC
3.5
ns
相關(guān)PDF資料
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SAH-XC2387C-136F100L 32-BIT, FLASH, 100 MHz, RISC MICROCONTROLLER, PQFP144
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SAF-XC2387C-200F100L 32-BIT, FLASH, 100 MHz, RISC MICROCONTROLLER, PQFP144
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