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參數資料
| 型號： | SAF7129AH |
| 廠商： | NXP Semiconductors N.V. |
| 元件分類： | 通用總線功能 |
| 英文描述： | Digital video encoder |
| 文件頁數： | 30/56頁 |
| 文件大?。?/td> | 259K |
| 代理商： | SAF7129AH |
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2004 Mar 16
30
Philips Semiconductors
Product specification
Digital video encoder
SAF7129AH
Table 50
Subaddress 6BH
Table 51
Selection of the signal type on pin RCV1
BIT
SYMBOL
DESCRIPTION
7
6
5
SRCV11
SRCV10
TRCV2
These 2 bits define signal type on pin RCV1; see Table 51
0 = horizontal synchronization is taken from RCV1 port (at bit SYMP = LOW) or from
decoded frame sync of “ITU-R BT.656”input (at bit SYMP = HIGH); default state after
reset
1 = horizontal synchronization is taken from RCV2 port (at bit SYMP = LOW)
0 = pin RCV1 is switched to input; default state after reset
1 = pin RCV1 is switched to output
0 = polarity of RCV1 as output is active HIGH, rising edge is taken when input; default
state after reset
1 = polarity of RCV1 as output is active LOW, falling edge is taken when input
When CBLF = 0.
If ORCV2 = 1, pin RCV2 provides an HREF signal (horizontal reference pulse that is
defined by RCV2S and RCV2E, also during vertical blanking interval); default state
after reset.
If ORCV2 = 0 and bit SYMP = 0, signal input to RCV2 is used for horizontal
synchronization only (if TRCV2 = 1); default state after reset.
When CBLF = 1.
If ORCV2 = 1, pin RCV2 provides a ‘composite-blanking-not’ signal, for example a
reference pulse that is defined by RCV2S and RCV2E, excluding vertical blanking
interval, which is defined by FAL and LAL.
If ORCV2 = 0 and bit SYMP = 0, signal input to RCV2 is used for horizontal
synchronization (if TRCV2 = 1) and as an internal blanking signal.
0 = pin RCV2 is switched to input; default state after reset
1 = pin RCV2 is switched to output
0 = polarity of RCV2 as output is active HIGH, rising edge is taken when input,
respectively; default state after reset
1 = polarity of RCV2 as output is active LOW, falling edge is taken when input,
respectively
4
ORCV1
3
PRCV1
2
CBLF
1
ORCV2
0
PRCV2
SRCV11
SRCV10
RCV1
FUNCTION
0
0
1
0
1
0
VS
FS
Vertical Sync each field; default state after reset
Frame Sync (odd/even)
Field Sequence, vertical sync every fourth field (PAL = 0), eighth field
(PAL = 1) or twelfth field (SECAM = 1)
not applicable
FSEQ
1
1
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相關代理商/技術參數 |
參數描述 |
|---|---|
| SAF7129AH/V1 | 功能描述:視頻 IC 6 DAC VIDEO ENCODER RoHS:否 制造商:Fairchild Semiconductor 工作電源電壓:5 V 電源電流:80 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-28 封裝:Reel |
| SAF7129AH/V1,518 | 功能描述:視頻 IC 6 DAC VIDEO ENCODER RoHS:否 制造商:Fairchild Semiconductor 工作電源電壓:5 V 電源電流:80 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-28 封裝:Reel |
| SAF7129AH/V1,557 | 功能描述:視頻 IC 6 DAC VIDEO ENCODER RoHS:否 制造商:Fairchild Semiconductor 工作電源電壓:5 V 電源電流:80 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-28 封裝:Reel |
| SAF7129AH/V1-T | 功能描述:視頻 IC 6 DAC VIDEO ENCODER RoHS:否 制造商:Fairchild Semiconductor 工作電源電壓:5 V 電源電流:80 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-28 封裝:Reel |
| SAF7167AHW | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:YUV-to-RGB digital-to-analog converter |
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