參數(shù)資料
型號(hào): SAF1761BE
廠商: NXP SEMICONDUCTORS
元件分類: 總線控制器
英文描述: Hi-Speed Universal Serial Bus On-The-Go controller
中文描述: UNIVERSAL SERIAL BUS CONTROLLER, PQFP128
封裝: 14 X 20 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT425-1, LQFP-128
文件頁數(shù): 1/166頁
文件大小: 4093K
代理商: SAF1761BE
1.
General description
The SAF1761 is a single-chip Hi-Speed Universal Serial Bus (USB) On-The-Go (OTG)
Controller integrated with advanced NXP slave host controller and the peripheral
controller.
The Hi-Speed USB host controller and peripheral controller comply to
Ref. 1 “Universal
Serial Bus Specification Rev. 2.0”
and support data transfer speeds of up to 480 Mbit/s.
The Enhanced Host Controller Interface (EHCI) core implemented in the host controller is
adapted from
Ref. 2 “Enhanced Host Controller Interface Specification for Universal Serial
Bus Rev. 1.0”
. The OTG controller adheres to
Ref. 3 “On-The-Go Supplement to the USB
Specification Rev. 1.3”
.
The SAF1761 has three USB ports. Port 1 can be configured to function as a downstream
port, an upstream port or an OTG port; ports 2 and 3 are always configured as
downstream ports. The OTG port can switch its role from host to peripheral, and
peripheral to host. The OTG port can become a host through the Host Negotiation
Protocol (HNP) as specified in the OTG supplement.
2.
Features
I
Automotive qualified in accordance with AEC-Q100
I
Compliant with
Ref. 1 “Universal Serial Bus Specification Rev. 2.0”
; supporting data
transfer at high-speed (480 Mbit/s), full-speed (12 Mbit/s) and low-speed (1.5 Mbit/s)
I
Integrated Transaction Translator (TT) for original USB (full-speed and low-speed)
peripheral support
I
Three USB ports that support three operational modes:
N
Mode 1: Port 1 is an OTG controller port, and ports 2 and 3 are host controller
ports
N
Mode 2: Ports 1, 2 and 3 are host controller ports
N
Mode 3: Port 1 is a peripheral controller port, and ports 2 and 3 are host controller
ports
I
Supports OTG Host Negotiation Protocol (HNP) and Session Request Protocol (SRP)
I
Multitasking support with virtual segmentation feature (up to four banks)
I
High-speed memory controller (variable latency and SRAM external interface)
I
Directly addressable memory architecture
I
Generic processor interface to most CPUs, such as Hitachi SH-3 and SH-4, NXP XA,
Intel StrongARM, NEC and Toshiba MIPS, Freescale DragonBall and PowerPC
Reduced Instruction Set Computer (RISC) processors
I
Configurable 32-bit and 16-bit external memory data bus
I
Supports Programmed I/O (PIO) and Direct Memory Access (DMA)
SAF1761
Hi-Speed Universal Serial Bus On-The-Go controller
Rev. 01 — 18 November 2009
Product data sheet
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