參數(shù)資料
型號(hào): SAF-XE164H-96F66L
廠商: INFINEON TECHNOLOGIES AG
元件分類: 微控制器/微處理器
英文描述: 16-BIT, FLASH, MICROCONTROLLER, PQFP100
封裝: 0.50 MM PITCH, GREEN, PLASTIC, LQFP-100
文件頁數(shù): 108/113頁
文件大?。?/td> 1498K
代理商: SAF-XE164H-96F66L
XE164x
XE166 Family Derivatives
Electrical Parameters
Preliminary
Data Sheet
92
V2.0, 2008-03
Figure 19
Approximated Accumulated PLL Jitter
Note: The specified PLL jitter values are valid if the capacitive load per pin does not
exceed
C
L = 20 pF (see Table 11).
The maximum peak-to-peak noise on the pad supply voltage (measured between
V
DDPB pin 100/144 and VSS pin 1) is limited to a peak-to-peak voltage of VPP =
50 mV. This can be achieved by appropriate blocking of the supply voltage as
close as possible to the supply pins and using PCB supply and ground planes.
Different frequency bands can be selected for the VCO so that the operation of the PLL
can be adjusted to a wide range of input and output frequencies:
Table 24
VCO Bands for PLL Operation1)
1) Not subject to production test - verified by design/characterization.
PLLCON0.VCOSEL VCO Frequency Range
Base Frequency Range
00
50 … 110 MHz
10 … 40 MHz
01
100 … 160 MHz
20 … 80 MHz
1X
Reserved
MC_XC2X_JITTER
Cycles
T
0
±1
±2
±3
±4
±5
±6
±7
±8
Acc. jitter
DT
20
40
60
80
100
ns
fSYS = 66 MHz
1
fVCO = 132 MHz
fVCO = 66 MHz
±9
fSYS = 33 MHz
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