
C505L
Data Sheet
21
06.99
Table 2
Special Function Registers - Functional Blocks
Block
Symbol
Name
Address
Contents after
Reset
CPU
ACC
B
DPH
DPL
DPSEL
PSW
SP
SYSCON
2)
VR0
4)
VR1
4)
VR2
4)
Accumulator
B-Register
Data Pointer, High Byte
Data Pointer, Low Byte
Data Pointer Select Register
Program Status Word Register
Stack Pointer
System Control Register
Version Register 0
Version Register 1
Version Register 2
E0
H
F0
H
83
H
82
H
92
H
D0
H
81
H
B1
H
FC
H
FD
H
FE
H
D8
H
DC
H
D9
H
DA
H
90
H
A8
H
B8
H
A9
H
B9
H
88
H
C8
H
98
H
C0
H
91
H
1)
1)
1)
00
H
00
H
00
H
00
H
XXXXX000
B
00
H
07
H
XX10XX01
B
C5
H
85
H
5)
3)
3)
A/D-
Converter
ADCON0
2)
ADCON1
ADDATH
ADDATL
P1ANA
2)
A/D Converter Control Register 0
A/D Converter Control Register 1
A/D Converter Data Register High Byte
A/D Converter Data Register Low Byte
Port 1 Analog Input Selection Register
1)
4)
00X00000
B
01XXX000
B
00
H
00XXXXXX
B
FF
H
00
H
00
H
00
H
XX000000
B
00
H
00X00000
B
00
H
00
H
00
H
3)
3)
3)
Interrupt
System
IEN0
2)
IEN1
2)
IP0
2)
IP1
TCON
2)
T2CON
2)
SCON
2)
IRCON
Interrupt Enable Register 0
Interrupt Enable Register 1
Interrupt Priority Register 0
Interrupt Priority Register 1
Timer Control Register
Timer 2 Control Register
Serial Channel Control Register
Interrupt Request Control Register
1)
1)
1)
1)
1)
1)
3)
XRAM
XPAGE
SYSCON
2)
Page Address Register for Extended on-chip
XRAM, LCD Controller and RTC
System Control Register
B1
H
80
H
90
H
90
H
A0
H
B0
H
E8
H
F8
H
XX10XX01
B
FF
H
FF
H
FF
H
FF
H
FF
H
00
B
XX111111
B
3)
Ports
P0
P1
P1ANA
2)
P2
P3
P4
P5
Port 0
Port 1
Port 1 Analog Input Selection Register
Port 2
Port 3
Port 4
Port 5
1)
1)
1) 4)
1)
1)
1)
1)
1) Bit-addressable SFRs
2) This SFR is listed repeatedly since some bits of it also belong to other functional blocks.
3) “X” means that the value is undefined and the location is reserved
4) This SFR is a mapped SFR. For accessing this SFR, bit RMAP in SFR SYSCON must be set.
5) The content of this SFR varies with the actual step of the C505L (e.g. 01
H
for the first step)