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參數(shù)資料
| 型號(hào)： | SAB-C505-LM |
| 廠商： | SIEMENS A G |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-Bit CMOS Microcontroller |
| 中文描述： | 8-BIT, MROM, 20 MHz, MICROCONTROLLER, PQFP44 |
| 封裝： | PLASTIC, MQFP-44 |
| 文件頁數(shù)： | 10/85頁 |
| 文件大?。?/td> | 487K |
| 代理商： | SAB-C505-LM |
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C505L
Data Sheet
8
06.99
RESET
43
I
RESET
A high level on this pin for two machine cycles while the
oscillator is running resets the device. An internal diffused
resistor to
V
SS
permits power-on reset using only an
external capacitor to
V
DD
.
The
Program Store Enable
output is a control signal that enables the external program
memory to the bus during external fetch operations. It is
activated every three oscillator periods except during
external data memory accesses. Remains high during
internal program execution. This pin should not be driven
during reset operation.
PSEN
44
O
ALE
45
O
The
Address Latch Enable
output is used for latching the low-byte of the address into
external memory during normal operation. It is activated
every three oscillator periods except during an external data
memory access. When instructions are executed from
internal program memory (EA = 1), the ALE generation can
be disabled by bit EALE in SFR SYSCON. This pin should
not be driven during reset operation.
EA
46
I
External Access Enable
This pin must be held at high level. Instructions are fetched
from the internal OTP memory when the PC is less than
8000
H
. Instructions are fetched from external program
memory, when the PC is greater than 7FFF
H
. This pin must
not be held at low level.
*) I = Input
O= Output
Table 1
Pin Definitions and Functions
(cont’d)
Symbol
Pin Number
I/O*)
Function
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