參數(shù)資料
型號： SAB-C167CS-4RM
廠商： INFINEON TECHNOLOGIES AG
英文描述： MN Series Basic Switch, Double Pole Double Throw Double Break Circuitry, 15 A at 480 Vac, Pin Plunger Actuator, 1,95 N - 3,1 N [7 oz - 11 oz] Operating Force, Quick Connect Termination, Fine Silver Contacts, Screw Termination, CSA, UL
中文描述： 16位單片機(jī)
文件頁數(shù)： 73/80頁
文件大?。?/td> 1151K
代理商： SAB-C167CS-4RM
C167CS-4R
C167CS-L
Data Sheet
69
V2.0, 2000-06
Bus Cycle Control via READY Input
The duration of an external bus cycle can be controlled by the external circuitry via the
READY input signal.
Synchronous
READY permits the shortest possible bus cycle but requires the input
signal to be synchronous to the reference signal CLKOUT.
Asynchronous
READY puts no timing constraints on the input signal but incurs one
waitstate minimum due to the additional synchronization stage.
Notes
(Valid also for
Figure 21
)
4)
Cycle as programmed, including MCTC waitstates (Example shows 0 MCTC WS).
5)
READY sampled HIGH at this sampling point generates a READY controlled waitstate,
READY sampled LOW at this sampling point terminates the currently running bus cycle.
6)
These timings are given for test purposes only, in order to assure recognition at a specific clock edge.
If the Asynchronous READY signal does not fulfill the indicated setup and hold times with respect to CLKOUT,
it must fulfill
tc
27
in order to be safely synchronized.
Proper deactivation of READY is guaranteed if READY is deactivated in response to the trailing (rising) edge
of the corresponding command (RD or WR).
7)
Multiplexed bus modes have a MUX waitstate added after a bus cycle, and an additional MTTC waitstate may
be inserted here. For a multiplexed bus
with
MTTC waitstate this delay is 2 CLKOUT cycles, for a
demultiplexed bus
without
MTTC waitstate this delay is zero.
8)
If the next following bus cycle is READY controlled, an active READY signal must be disabled before the first
valid sample point for the next bus cycle. This sample point depends on the MTTC waitstate of the current
cycle, and on the MCTC waitstates and the ALE mode of the next following cycle. If the current cycle uses a
multiplexed bus the intrinsic MUX waitstate adds another CLKOUT cycle to the READY deactivation time.
Table 17
Parameter
READY Timing
(Operating Conditions apply)
Symbol
Limits
min
Unit
max
–
Input setup time to CLKOUT rising edge
Valid for: READY input
Input hold time after CLKOUT rising edge
Valid for: READY input
Asynchronous READY input low time
6)
tc
25
CC
15
ns
tc
26
CC
0
–
ns
tc
27
CC
tc
5
+
tc
25
–
ns
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
SAB-C167CS-L16M3V 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:16-Bi t Single-Chip Microcontroller
SAB-C167CS-L33M 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:16-Bit Single-Chip Microcontroller
SABC167CSL40M 制造商:Infineon Technologies AG 功能描述:
SAB-C167CS-L40M 制造商:Infineon Technologies AG 功能描述:Micro, 16Bit, 11KB RAM, 40MHz, 2xCAN
SAB-C167CS-L40M CA+ 功能描述:16位微控制器 - MCU 16BIT SNGL CHIP 5V 40MHz ROM less RoHS:否 制造商:Texas Instruments 核心:RISC 處理器系列:MSP430FR572x 數(shù)據(jù)總線寬度:16 bit 最大時(shí)鐘頻率:24 MHz 程序存儲(chǔ)器大小:8 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:VQFN-40 安裝風(fēng)格:SMD/SMT
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