參數(shù)資料
型號(hào): SAA8117HL
廠商: NXP SEMICONDUCTORS
元件分類: 消費(fèi)家電
英文描述: REFLECTIVE PHOTOSENSOR SMD
中文描述: SPECIALTY CONSUMER CIRCUIT, PQFP100
封裝: 14 X 14 MM, 1.40 MM HEIGHT, PLASTIC, SOT-407-1, LQFP-100
文件頁(yè)數(shù): 32/60頁(yè)
文件大?。?/td> 231K
代理商: SAA8117HL
1999 Apr 02
32
Philips Semiconductors
Product specification
Digital camera USB interface IC
SAA8117HL
8.11
Audio
The PLL converts the 48 MHz to 256f
s
(f
s
= audio sample
frequency). There are three modes for the PLL to achieve
the sample frequencies of 48, 44.1 or 32 kHz
(see Table 1).
In the Fixed Gain Amplifier (FGA) the microphone input is
amplified by 20 dB.
The bit stream ADC samples the audio signal. It runs at an
oversample rate of 256 times the base sample rate. In the
application, the bit stream can be converted to parallel
16-bit samples. This conversion is programmable with
respect to the effective sample frequency (dropping
sample results in a lower effective sample frequency) and
sample resolution. As a result the effective sample rate
can be determined.
Table 1
ADC clock frequencies and sample frequencies
Note
1.
Not supported.
CLOCK
(MHz)
DIVIDING
NUMBER
SAMPLE
FREQUENCY
(kHz)
ADC CLOCK
(MHz)
8.1920
1
2
4
8
1
2
4
8
1
2
4
8
32
16
8
4.096
2.048
1.042
note 1
5.6448
2.8224
1.4112
0.7056
6.144
3.072
1.536
0.768
note 1
44.1
22.05
11.025
5.5125
48
24
12
6
11.2996
12.2880
8.12
Power management
The USB requires the device to switch power states.
The SAA8117HL contains a power management module
since the device may not consume more than 500
μ
A
during the power state called SUSPEND. This requires
that even the crystal oscillator must be switched off.
The SAA8117HL is also not functional except for some
logic that enables the IC to wake-up the camera. After
wake-up of the SAA8117HL first the clock to the
microcontroller is generated and thereafter an interrupt is
generated to wake-up the controller. Therefore the clock of
the microcontroller is generated by the SAA8117HL.
The power management module also sets a flag in register
I
2
C_SET_MODE_AND_READ. After a reset the
microcontroller should check this register via the I
2
C-bus
and find the cause of the wake-up. Different causes may
require different start-up routines.
The internal video processing core uses another
V
DDD
domain which can be switched during SUSPEND.
The PPG is switched off by setting SN_Resume and
resetting SN_PAL_VGA. In non CIF modes the power
consumption is reduced by resetting SN_Compress and
SN_CLK_Compress_On.
The SAA8117HL has the feature to independently
wake-up from SUSPEND, but requires a signal from the
microcontroller before going into SUSPEND (via the signal
on pin SUSREADYNOT).
Since the main oscillator of the SAA8117HL is switched off
during SUSPEND precautions are needed to avoid
undefined states when the clock is switched on. This is
ensured via the pins CLOCKON and TRC.
Pin CLOCKON goes HIGH as soon as the main oscillator
is switched on. The oscillator will need some time to make
a stable 48 MHz signal. However, the clock is only passed
through to other parts of the SAA8117HL when the level on
pin TRC reaches a certain threshold. The time needed to
reach the threshold can be trimmed with an RC-circuit.
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