參數(shù)資料
型號(hào): SAA7826HL
廠商: NXP Semiconductors N.V.
元件分類(lèi): DRAM
英文描述: CD audio decoder, digital servo and filterless DAC with integrated pre-amp and laser control
封裝: SAA7826HL/M1AS/S5<SOT315-1 (LQFP80)|<<http://www.nxp.com/packages/SOT315-1.html<1<Always Pb-free,;
文件頁(yè)數(shù): 78/89頁(yè)
文件大?。?/td> 379K
代理商: SAA7826HL
2003 Oct 01
78
Philips Semiconductors
Product specification
CD audio decoder, digital servo and filterless
DAC with integrated pre-amp and laser control
SAA7826
Notes
1.
The 4-wire bus mode microcontroller interface timing for writing to decoder registers 0 to F, and reading Q-channel
subcode and decoder status, is a function of the overspeed factor ‘n’. In the lock-to-disc mode the maximum data
rate is lower.
Negative set-up time means that the data may change after clock transition.
2.
t
hCLR
hold time SILD to
SCL
830
830
ns
W
RITE MODE
(C
L
= 20 pF)
t
sD
set-up time SDA to
SCL
hold time SCL to SDA
set-up time SCL to
SILD
hold time SILD to
SCL
delay between two
SILD pulses
delay time SDA to
SILD high-impedance
0
0
ns
t
hD
t
sCL
950
480
950
480
ns
ns
t
hCL
120
120
ns
t
dPLP
70
70
ns
t
dWZ
0
0
ns
SYMBOL
PARAMETER
CONDITIONS
NORMAL MODE
LOCK-TO-DISC MODE
UNIT
MIN.
MAX.
MIN.
MAX.
SDA (SAA782X)
SCL
RAB
tr
VDD
0.8 V
tr
tf
tf
VDD
0.8 V
VDD
0.8 V
tPD
tCL
tCH
tdRD
tdRZ
high-impedance
MBL451
Fig.36 4-wire microcontroller timing; read mode (Q-channel subcode and decoder status information).
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