參數(shù)資料
型號: SAA7708H
廠商: NXP Semiconductors N.V.
元件分類: 數(shù)字信號處理
英文描述: Car Radio Digital Signal Processor
中文描述: 汽車無線電數(shù)字信號處理器
文件頁數(shù): 11/60頁
文件大?。?/td> 281K
代理商: SAA7708H
1998 May 19
11
Philips Semiconductors
Preliminary specification
Car Radio Digital Signal Processor
SAA7708H
Pinning Table
Pin list SAA7708
SYMBOL
PIN
DESCRIPTION
PIN
TYPE
VDACP
VDACN1
LEVEL
1
2
3
Positive reference voltage SCAD1, SCAD2 and Level AD
Ground reference voltage 1 SCAD1, SCAD2 and Level AD
FM/AM-level input pin. Via this pin the level of the FM signal or level of
the AM signal is fed to the CDSP. The level information is used in the
DSP for signal correction
By I2C switchable common mode reference pin to enable an arbitrary
high common mode analog input.
Power on Mute of the FADER DAC. Timing is determined by an external
capacitor.
Rear Right audio voltage output of the FADER DAC
Rear Right audio current output of the FADER DAC
Rear Left audio current output of the FADER DAC
Rear Left audio voltage output of the FADER DAC
Ground supply analog part of the FADER DAC and SPDIF bitslicer
3V positive supply analog part of the FADER DAC and SPDIF bitslicer
Voltage reference of the analog part of the FADER DAC
Front Right audio voltage output of the FADER DAC
Front Right audio current output of the FADER DAC
Front Left audio current output of the FADER DAC
Front Left audio voltage output of the FADER DAC
Test pin, may not be connected in the application
Test pin, may not be connected in the application
Test pin, may not be connected in the application
Test pin, may not be connected in the application
Test pin, may not be connected in the application
5V positive supply 1 peripheral cells only
Ground supply 1 of 5 volt peripheral cells only
Analog bitslicer input2 for SPDIF, can be selected i.s.o. SPDIF1 via I2C
bit
Analog bitslicer input1 for SPDIF, can be selected i.s.o. SPDIF2 via I2C
bit
Test pin, may not be connected in the application
I
2
S or LSB justified format Word select input from a digital audio source
I
2
S or LSB justified format Left-Right Data input from a digital audio
source
I
2
S Clock or LSB justified format input from a digital audio source
Test pin, may not be connected in the application
Test pin, may not be connected in the application
Test pin, may not be connected in the application
AP2D
AP2D
AP2D
AUX_GND
4
AP2D
POM
5
APR2D
RRV
RRI
RLI
RLV
VSSA2
VDDA2
VREFDA
FRV
FRI
FLI
FLV
TP1
TP2
TP3
TP4
TP5
VDDD5V1
VSSD5V1
SPDIF2
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
AP2D
APR2D
APR2D
AP2D
APVSS
APVDD
AP2D
AP2D
APR2D
APR2D
AP2D
BT4CR
BT4CR
BT4CR
BT4CR
BD4CR
VDDE5
VSSE5
APR2D
SPDIF1
25
APR2D
TP6
CD_WS
CD_DATA
26
27
28
SCHMITCD
SCHMITCD
SCHMITCD
CD_CL
TP7
TP8
TP9
29
30
31
32
SCHMITCD
BD4CRD
SCHMITCD
SCHMITCD
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