參數(shù)資料
型號(hào)： SAA7380
廠商： NXP Semiconductors N.V.
英文描述： Error correction and host interface IC for CD-ROM ELM
中文描述： 錯(cuò)誤更正和主機(jī)接口集成電路的CD - ROM榆木
文件頁(yè)數(shù)： 37/60頁(yè)
文件大小： 227K
代理商： SAA7380
1996 Apr 25
37
Philips Semiconductors
Preliminary specification
Error correction and host interface IC for
CD-ROM (ELM)
SAA7380
DRAM interface timing;
see Figs 11 and 12; note 2
t
RC
t
PC
t
CAC
t
RAC
t
OFF
t
RHCP
read or write cycle period
page mode cycle time
access time from CAS
access time from RAS
output disable time from CAS
RAS hold time from CAS precharge
page mode
column address access
RAS HIGH time
RAS LOW time
RAS hold time
CAS LOW time
CAS hold time
CAS HIGH pulse width
delay CAS HIGH to RAS
RAS to CAS delay time
RAS to column address delay
row address set-up time
row address hold time
column address set-up time
column address hold time
column address hold time from
RAS LOW
column address to RAS lead
read set-up time before CAS
read command hold time
read command hold time from RAS
write command hold time
write command LOW time
write command hold time from RAS
write command to CAS lead
write command to RAS lead
data output set-up time
data output hold time
data output hold from RAS
refresh cycle time
10T
4T
0
4T
3T
10
7T
10
ns
ns
ns
ns
ns
ns
t
CAA
t
RP
t
RAS
t
RSH
t
CAS
t
CSH
t
CP
t
CRP
t
RCD
t
RAD
t
ASR
t
RAH
t
ASC
t
CAH
t
AR
4T
6T
4T
10
3T
7T
10
T
3T
10
2T
T
3T
10
T
T
3T
10
5T
10
4T
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
t
RAL
t
RCS
t
RCH
t
RRH
t
WCH
t
WP
t
WCR
t
CWL
t
RWL
t
DS
t
DH
t
DHR
t
RFSH
3T
4T
10
T
2T
10
6T
10
10T
8T
10
9T
10
8T
10
T
3T
7T
10
2T
10
6T
10
T
400T
800T
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
MEMS(3) = 0
MEMS(3) = 1
t
CSR
t
CHR
t
RPC
CAS set-up time for refresh
CAS hold time for refresh
precharge to CAS active time
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
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