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參數(shù)資料
| 型號： | SAA7282ZP |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 消費家電 |
| 英文描述： | Terrestrial Digital Sound Decoder TDSD2 |
| 中文描述： | SPECIALTY CONSUMER CIRCUIT, PDIP32 |
| 封裝： | 0.400 INCH, PLASTIC, SDIP-32 |
| 文件頁數(shù)： | 7/25頁 |
| 文件大?。?/td> | 110K |
| 代理商： | SAA7282ZP |
July 1993
7
Philips Semiconductors
Product specification
Terrestrial Digital Sound Decoder (TDSD2)
SAA7282
I
2
C-BUS FORMATS
The SAA7282 contains an I
2
C-bus slave transceiver permitting a master device to:
Read decoder status information derived from the transmitted digital audio signal
Read an error count byte to determine the bit error rate for user mute purposes and to indicate quality of NICAM signal
Read additional transmitted data bits. Their purpose has yet to be defined but accessibility is provided to allow future
services to be implemented in receiver software
Write control codes to select the available analog switching configurations
Write upper and lower error count limits for automatic muting function
The device slave address is A(7:1)(R/W) = 101101X(R/W). An ADSEL pin is provided to allow selection of one of two
different slave addresses via programmable address bit A1. (X = ADSEL logic level).
The SAA7282 does not acknowledge the I
2
C-bus general call address.
The slave receiver format is:
S SLAVE_ADDR.0 ACK SUB_ADDR ACK DATA BYTE ACK P
<
n bytes
>
Where S = start, ACK = acknowledge, P = stop.
Auto-increment of the sub-address is provided with wrap-around from 02 (HEX) to 00 (HEX).
The slave receiver data byte format, as a function of sub-address, is as shown in Table 1.
Table 1
Slave receiver data byte.
M1/M2
This bit in conjunction with DMSEL bit, determines the output configuration in dual mono mode (see Table 2).
Power-on resets to logic 1.
DMSEL
This bit determines whether one or both of the dual mono signals are output (see Table 2). Power-on resets to logic 0.
PORT2
PORT2 controls a bit out, providing direct access to a dedicated output pin (PORT2) via the I
2
C-bus. See Table 3.
Power-on resets to logic 0.
SSWIT3/2/1
These bits control the analog switching, selecting between the FM, external, and NICAM signals. With the NICAM source
the signals select whether the de-emphasis is performed and what gain is applied after the filtering and de-emphasis
stage. The signal states and their meaning are listed in Table 4. Power-on resets to 0/1/0.
SUB-
ADDRESS
RESET
VALUE
HEX
D7
D6
D5
D4
D3
D2
D1
D0
00
01
10
90
50
14
M1/M2
EMAX7
EMIN7
DMSEL
EMAX6
EMIN6
SSWIT3
EMAX5
EMIN5
SSWIT2
EMAX4
EMIN4
SSWIT1
EMAX3
EMIN3
PORT2
EMAX2
EMIN2
MUTEDEF
EMAX1
EMIN1
AMDIS
EMAX0
EMIN0
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| SAA7283ZP | Terrestrial Digital Sound Decoder TDSD3 |
| SAA7283 | Terrestrial Digital Sound Decoder TDSD3 |
| SAA7283GP | Terrestrial Digital Sound Decoder TDSD3 |
| SAA7284GP | Terrestrial digital sound decoder for conventional intercarrier PLL-IF systems |
| SAA7384 | Terrestrial digital sound decoder for conventional intercarrier PLL-IF systems |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SAA7283 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Terrestrial Digital Sound Decoder TDSD3 |
| SAA7283GP | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Terrestrial Digital Sound Decoder TDSD3 |
| SAA7283ZP | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Terrestrial Digital Sound Decoder TDSD3 |
| SAA7284 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Terrestrial digital sound decoder for conventional intercarrier PLL-IF systems |
| SAA7284GP | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Terrestrial digital sound decoder for conventional intercarrier PLL-IF systems |
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