參數(shù)資料
型號(hào): SAA7216
廠商: NXP Semiconductors N.V.
英文描述: Integrated MPEG2 AVG Decoder(綜合MPEG音頻視頻圖表譯碼器)
中文描述: 集成MPEG2解碼器的AVG(綜合的MPEG音頻視頻圖表譯碼器)
文件頁數(shù): 9/28頁
文件大小: 101K
代理商: SAA7216
2000 Jan 31
9
Philips Semiconductors
Preliminary specification
Integrated MPEG AVGD decoders
SAA7215; SAA7216; SAA7221
PINNING
Pinning table (listed numerically)
SYMBOL
PIN
TYPE
(1)
DESCRIPTION
V
SS
DATA(4)
DATA(5)
DATA(6
DATA(7)
DATA(8)
DATA(9)
V
DD
DATA(10)
DATA(11)
DATA(12)
DATA(13)
DATA(14)
DATA(15)
V
SS
SDRAM_ADDR1(3)
SDRAM_ADDR1(2)
SDRAM_ADDR1(4)
SDRAM_ADDR1(1)
SDRAM_ADDR1(5)
SDRAM_ADDR1(0)
V
DD
SDRAM_ADDR1(6)
SDRAM_ADDR1(10)
SDRAM_ADDR1(7)
V
SS(CO)
V
DD(CO)
SDRAM_ADDR1(11)
SDRAM_ADDR1(9)
SDRAM_ADDR1(8)
V
SS
SDRAM_UDQ1
SDRAM_RAS1
SDRAM_CAS1
SDRAM_WE1
V
DD
SDRAM_DATA1(8)
SDRAM_DATA1(7)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
S
ground for pad ring
CPU data input or output (bit 4); note 2
CPU data input or output (bit 5); note 2
CPU data input or output (bit 6); note 2
CPU data input or output (bit 7); note 2
CPU data input or output (bit 8); note 2
CPU data input or output (bit 9); note 2
supply voltage for pad ring
CPU data input or output (bit 10); note 2
CPU data input or output (bit 11); note 2
CPU data input or output (bit 12); note 2
CPU data input or output (bit 13); note 2
CPU data input or output (bit 14); note 2
CPU data input or output (bit 15); note 2
ground for pad ring
SDRAM address 1 output (bit 3)
SDRAM address 1 output (bit 2)
SDRAM address 1 output (bit 4)
SDRAM address 1 output (bit 1)
SDRAM address 1 output (bit 5)
SDRAM address 1 output (bit 0)
supply voltage for pad ring
SDRAM address 1 output (bit 6)
SDRAM address 1 output (bit 10)
SDRAM address 1 output (bit 7)
ground for core logic
supply voltage for digital core logic
SDRAM address 1 output (bit 11)
SDRAM address 1 output (bit 9)
SDRAM address 1 output (bit 8)
ground for pad ring
SDRAM write mask 1 output
SDRAM row address strobe 1 output
SDRAM column address 1 output
SDRAM write enable 1 output
supply voltage for pad ring
SDRAM data 1 input or output (bit 8)
SDRAM data 1 input or output (bit 7)
I/O
I/O
I/O
I/O
I/O
I/O
S
I/O
I/O
I/O
I/O
I/O
I/O
S
O
O
O
O
O
O
S
O
O
O
S
S
O
O
O
S
O
O
O
O
S
I/O
I/O
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