參數(shù)資料
型號: SAA7183WP
廠商: NXP SEMICONDUCTORS
元件分類: 顏色信號轉(zhuǎn)換
英文描述: Digital Video Encoder EURO-DENC
中文描述: COLOR SIGNAL ENCODER, PQCC84
封裝: PLASTIC, SOT-189-2, LCC-84
文件頁數(shù): 21/40頁
文件大小: 268K
代理商: SAA7183WP
1996 Jul 08
21
Philips Semiconductors
Preliminary specification
Digital Video Encoder (EURO-DENC)
SAA7182; SAA7183
Table 26
Logic levels and function of FLC
Table 27
Subaddress 6F
Table 28
Logic levels and function of CCEN
Table 29
Subaddress 70 to 72
DATA BYTE
FUNCTION
FLC1
FLC0
0
0
1
1
0
1
0
1
interlaced 312.5 lines/field at 50 Hz, 262.5 lines/field at 60 Hz; default after reset
non-interlaced 312 lines/field at 50 Hz, 262 lines/field at 60 Hz
non-interlaced 313 lines/field at 50 Hz, 263 lines/field at 60 Hz
non-interlaced 313 lines/field at 50 Hz, 263 lines/field at 60 Hz
DATA BYTE
LOGIC LEVEL
0
1
DESCRIPTION
CCEN
TTXEN
enables individual line 21 encoding; see Table 28
disables teletext insertion
enables teletext insertion
selects the actual line, where closed caption or extended data are encoded
line = (SCCLN + 4) for M-systems
line = (SCCLN + 1) for other systems
SCCLN
DATA BYTE
FUNCTION
CCEN1
CCEN0
0
0
1
1
0
1
0
1
Line 21 encoding off
enables encoding in field 1 (odd)
enables encoding in field 2 (even)
enables encoding in both fields
DATA BYTE
DESCRIPTION
RCV2S
start of output signal on RCV2 pin
values above 1715 (FISE = 1) or 1727 (FISE = 0) are not allowed
first active pixel at analog outputs (corresponding input pixel coinciding with RCV2) at
RCV2S = 0F2H (110H)
end of output signal on RCV2 pin
values above 1715 (FISE = 1) or 1727 (FISE = 0) are not allowed
last active pixel at analog outputs (corresponding input pixel coinciding with RCV2) at
RCV2E = 67CH (68AH)
RCV2E
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