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參數(shù)資料
| 型號： | SAA7127H |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 顏色信號轉(zhuǎn)換 |
| 英文描述： | Digital video encoder |
| 中文描述： | COLOR SIGNAL ENCODER, PQFP44 |
| 封裝： | 10 X 10 MM, 1.75 MM HEIGHT, PLASTIC, SOT-307-2, QFP-44 |
| 文件頁數(shù)： | 6/40頁 |
| 文件大小： | 155K |
| 代理商： | SAA7127H |
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1999 May 31
6
Philips Semiconductors
Product specification
Digital video encoder
SAA7126H; SAA7127H
FUNCTIONAL DESCRIPTION
The digital video encoder encodes digital luminance and
colour difference signals into analog CVBS, S-video and
simultaneously RGB or Cr-Y-Cb signals. NTSC-M, PAL
B/G and sub-standards are supported.
Both interlaced and non-interlaced operation is possible
for all standards.
The basic encoder function consists of subcarrier
generation, colour modulation and insertion of
synchronization signals. Luminance and chrominance
signals are filtered in accordance with the standard
requirements of “RS-170-A”and “ITU-R BT.470-3”
For ease of analog post filtering the signals are twice
oversampled with respect to the pixel clock before
digital-to-analog conversion.
The total filter transfer characteristics are illustrated in
Figs 3 to 8. The DACs for Y, C and CVBS are realized with
full 10-bit resolution; 9-bit resolution for RGB output.
The Cr-Y-Cb to RGB dematrix can be bypassed optionally
in order to provide the upsampled Cr-Y-Cb input signals.
The 8-bit multiplexed Cb-Y-Cr formats are “CCIR 656”
(D1 format) compatible, but the SAV and EAV codes can
be decoded optionally; when the device is operated in
slave mode. Two independent data streams can be
processed, one latched by the rising edge of LLC1, the
other latched by the falling edge of LLC1. The purpose of
that is e.g. to forward one of the data streams containing
both video and On Screen Display (OSD) information to
the RGB outputs, and the other stream containing video
only to the encoded outputs CVBS and S-video.
For optimum display of RGB signals through a
euro-connector TV set, an early composite sync pulse (up
to 31LLC1 clock periods) can be provided optionally on the
CVBS output.
It is also possible to connect a Philips digital video decoder
(SAA7111, SAA7711A, SAA7112 or SAA7151B) to the
SAA7126H; SAA7127H. Information concerning the actual
subcarrier, PAL-ID and (with SAA7111 and newer types)
definite subcarrier phase can be inserted via the RTCI pin,
connected to the RTCO pin of a decoder.
The SAA7126H; SAA7127H synthesizes all necessary
internal signals, colour subcarrier frequency and
synchronization signals from that clock.
Wide screen signalling data can be loaded via the I
2
C-bus
and is inserted into line 23 for standards using a 50 Hz
field rate.
VPS data for program dependent automatic start and stop
of such featured VCR’s is loadable via the I
2
C-bus.
The IC also contains closed caption and extended data
services encoding (line 21), and supports anti-taping
signal generation in accordance with Macrovision. It is also
possible to load data for copy generation management
system into line 20 of every field (525/60 line counting).
A number of possibilities are provided for setting different
video parameters such as:
Black and blanking level control
Colour subcarrier frequency
Variable burst amplitude etc.
During reset (RESET = LOW) and after reset is released,
all digital I/O stages are set to the input mode and the
encoder is set to PAL mode and outputs a ‘black burst’
signal on CVBS and S-video outputs, while RGB outputs
are set to their lowest output voltages. A reset forces the
I
2
C-bus interface to abort any running bus transfer.
Data manager
In the data manager, alternatively to the external video
data, a pre-defined colour look-up table located in this
block can be read out in a pre-defined sequence (8 steps
per active video line), achieving a colour bar test pattern
generator without need for an external data source.
Encoder
V
IDEO PATH
The encoder generates out of Y, U and V baseband
signals luminance and colour subcarrier output signals,
suitable for use as CVBS or separate Y and C signals.
Luminance is modified in gain and in offset (latter
programmable in a certain range to enable different black
level set-ups). After insertion of a fixed synchronization
pulse tip level, in accordance with standard composite
synchronization schemes, a blanking level can be set.
Other manipulations used for the Macrovision anti-taping
process such as additional insertion of AGC super-white
pulses (programmable in height) are supported by
SAA7126H only.
In order to enable easy analog post filtering, luminance is
interpolated from 13.5 MHz data rate to 27 MHz data rate,
providing luminance in 10-bit resolution. The transfer
characteristic of the luminance interpolation filter are
illustrated in Figs 5 and 6. Appropriate transients at
start/end of active video and for synchronization pulses
are ensured.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| SAA7128A | Digital video encoder |
| SAA7128AH | Digital video encoder |
| SAA7129AH | Digital video encoder |
| SAA7129AH | Digital video encoder |
| SAA7128 | Digital video encoder |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SAA7128 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Digital video encoder |
| SAA7128A | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Digital video encoder |
| SAA7128AH | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Digital video encoder |
| SAA7128H | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Digital video encoder |
| SAA7129 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Digital video encoder |
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