參數(shù)資料
型號： SAA7125HZ
廠商： NXP SEMICONDUCTORS
元件分類： 顏色信號轉(zhuǎn)換
英文描述： Digital Video Encoder ECO-DENC
中文描述： COLOR SIGNAL ENCODER, PQFP64
封裝： PLASTIC, SOT-314, QFP-64
文件頁數(shù)： 23/44頁
文件大?。?/td> 344K
代理商： SAA7125HZ
1996 Nov 07
23
Philips Semiconductors
Preliminary specification
Digital Video Encoder (ECO-DENC)
SAA7124; SAA7125
Table 18
Subaddress 6B
Table 19
Logic levels and function of SRCV1
DATA BYTE
LOGIC LEVEL
DESCRIPTION
PRCV2
0
polarity of RCV2 as output is active HIGH, rising edge is taken when input,
respectively; default after reset
polarity of RCV2 as output is active LOW, falling edge is taken when input,
respectively
pin RCV2 is switched to input; default after reset
pin RCV2 is switched to output
if ORCV2 = HIGH, pin RCV2 provides an HREF signal (Horizontal Reference pulse
that is defined by RCV2S and RCV2E, also during vertical blanking Interval); default
after reset
1
ORCV2
0
1
0
CBLF
if ORCV2 = LOW and bit SYMP = LOW, signal input to RCV2 is used for horizontal
synchronization only (if TRCV2 = HIGH); default after reset
if ORCV2 = HIGH, pin RCV2 provides a ‘Composite-Blanking-Not’ signal, this is a
reference pulse that is defined by RCV2S and RCV2E, excluding Vertical Blanking
Interval, which is defined by FAL and LAL
1
if ORCV2 = LOW and bit SYMP = LOW, signal input to RCV2 is used for horizontal
synchronization (if TRCV2 = HIGH) and as an internal blanking signal
polarity of RCV1 as output is active HIGH, rising edge is taken when input; default
after reset
polarity of RCV1 as output is active LOW, falling edge is taken when input
pin RCV1 is switched to input; default after reset
pin RCV1 is switched to output
horizontal synchronization is taken from RCV1 port (at bit SYMP = LOW) or from
decoded frame sync of “CCIR 656”input (at bit SYMP = HIGH); default after reset
horizontal synchronization is taken from RCV2 port (at bit SYMP = LOW)
defines signal type on pin RCV1; see Table 19
PRCV1
0
1
0
1
0
ORCV1
TRCV2
1
SRCV1
DATA BYTE
AS OUTPUT
AS INPUT
FUNCTION
SRCV11
SRCV10
0
0
1
0
1
0
VS
FS
VS
FS
vertical sync each field; default after reset
frame sync (odd/even)
field sequence, vertical sync every fourth field
(PAL = 0) or eighth field (PAL = 1)
FSEQ
FSEQ
1
1
not applicable
not applicable
相關(guān)PDF資料
PDF描述
SAA7125WP Digital Video Encoder ECO-DENC
SAA7126 Digital video encoder
SAA7126H Digital video encoder
SAA7127 Digital video encoder
SAA7127H Digital video encoder
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
SAA7125HZBD 制造商:NXP Semiconductors 功能描述:COLOR SIGNAL ENCODER, PQFP64
SAA7125WP 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Digital Video Encoder ECO-DENC
SAA7126 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Digital video encoder
SAA7126H 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Digital video encoder
SAA7127 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Digital video encoder
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