參數(shù)資料
型號： SAA7113
廠商： NXP Semiconductors N.V.
英文描述： GT 14C 14#16 PIN PLUG
中文描述： 9位視頻輸入處理器
文件頁數(shù)： 22/80頁
文件大?。?/td> 279K
代理商： SAA7113
1999 Jul 01
22
Philips Semiconductors
Product specification
9-bit video input processor
SAA7113H
8.5
Synchronization
The prefiltered luminance signal is fed to the
synchronization stage. Its bandwidth is further reduced to
1 MHz in a low-pass filter. The sync pulses are sliced and
fed to the phase detectors where they are compared with
the sub-divided clock frequency. The resulting output
signal is applied to the loop filter to accumulate all phase
deviations. Internal signals (e.g. HCL and HSY) are
generated in accordance with analog front-end
requirements. The loop filter signal drives an oscillator to
generate the line frequency control signal LFCO,
see Fig.19.
The detection of ‘pseudo syncs’ as part of the macrovision
copy protection standard is also done within the
synchronization circuit.
The result is reported as flag COPRO within the decoder
status byte at subaddress 1FH.
8.6
Clock generation circuit
The internal CGC generates all clock signals required for
the video input processor. The internal signal LFCO is a
digital-to-analog converted signal provided by the
horizontal PLL. It is the multiple of the line frequency
[6.75 MHz = 429
×
f
H
(50 Hz) or 432
×
f
H
(60 Hz)].
Internally the LFCO signal is multiplied by a factor of
2 and 4 in the PLL circuit (including phase detector, loop
filtering, VCO and frequency divider) to obtain the output
clock signals. The rectangular output clocks have a 50%
duty factor.
Fig.20 Block diagram of clock generation circuit.
handbook, full pagewidth
BAND PASS
FC = LLC/4
ZERO
CROSS
DETECTION
PHASE
DETECTION
LOOP
FILTER
DIVIDER
1/2
DIVIDER
1/2
OSCILLATOR
MHB330
LLC2
LLC
LFCO
Table 1
Clock frequencies
CLOCK
FREQUENCY (MHz)
XTAL
LLC
24.576
27
13.5
6.75
3.375
LLC2 (internal)
LLC4 (internal)
LLC8 (virtual)
8.7
Power-on reset and CE input
A missing clock, insufficient digital or analog V
DDA0
supply
voltages (below 2.8 V) will initiate the reset sequence; all
outputs are forced to 3-state (see Fig.21).
It is possible to force a reset by pulling the Chip Enable
(CE) to ground. After the rising edge of CE and sufficient
power supply voltage, the outputs LLC and SDA return
from 3-state to active, while RTS0, RTS1 and RTCO
remain in 3-state and have to be activated via I
2
C-bus
programming (see Table 2).
相關PDF資料
PDF描述
SAA7114H PAL/NTSC/SECAM video decoder with adaptive PAL/NTSC comb filter, VBI data slicer and high performance scaler
SAA7114E PAL/NTSC/SECAM video decoder with adaptive PAL/NTSC comb filter, VBI data slicer and high performance scaler
SAA7114 PAL/NTSC/SECAM video decoder with adaptive PAL/NTSC combfilter, VBI-data slicer and high performance scaler
SAA7115 PAL/NTSC/SECAM Video Decoder with Adaptive PAL/NTSC Comb Filter, High Performance Scaler, I2C Sliced Data Readback and SQ PIXEL OUTPUT
SAA7116 Digital Video to PCI Interface
相關代理商/技術參數(shù)
參數(shù)描述
SAA7113H 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:9-bit video input processor
SAA7113H/V2,518 功能描述:視頻 IC VIDEO INPUT PROCESSOR (V9) RoHS:否 制造商:Fairchild Semiconductor 工作電源電壓:5 V 電源電流:80 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-28 封裝:Reel
SAA7113H/V2,557 功能描述:視頻 IC 9-BIT VIDEO INPUT RoHS:否 制造商:Fairchild Semiconductor 工作電源電壓:5 V 電源電流:80 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-28 封裝:Reel
SAA7113H/V2557 制造商:NXP Semiconductors 功能描述:VIDEO INPUT PROCESSOR 9BIT 44QFP
SAA7113HB 功能描述:視頻 IC 9-BIT VIDEO INPUT PROCESSOR RoHS:否 制造商:Fairchild Semiconductor 工作電源電壓:5 V 電源電流:80 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-28 封裝:Reel
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