參數(shù)資料
型號(hào): SAA7110A
廠商: NXP SEMICONDUCTORS
元件分類: 顏色信號(hào)轉(zhuǎn)換
英文描述: Digital Multistandard Colour Decoder(數(shù)字多標(biāo)準(zhǔn)彩色譯碼器)
中文描述: COLOR SIGNAL DECODER, PQCC68
封裝: PLASTIC, MO-047AC, SOT-188-2, LCC-68
文件頁(yè)數(shù): 24/72頁(yè)
文件大小: 441K
代理商: SAA7110A
1998 May 15
24
Philips Semiconductors
Product specification
Enhanced Video Input Processor (EVIP)
SAA7111A
α
cs
channel crosstalk
f
i
= 5 MHz
50
dB
Analog-to-digital converters
B
φ
diff
bandwidth
differential phase
(amplifier plus anti-alias
filter = bypass)
differential gain
(amplifier plus anti-alias
filter = bypass)
ADC clock frequency
DC differential linearity
error
DC integral linearity error
at
3 dB
7
2
MHz
deg
G
diff
2
%
f
clkADC
DLE
12.8
0.7
14.3
MHz
LSB
ILE
1
LSB
Digital inputs
V
IL(SCL,SDA)
LOW level input voltage
pins SDA and SCL
HIGH level input voltage
pins SDA and SCL
LOW level CMOS input
voltage pin XTALI
HIGH level CMOS input
voltage pin XTALI
LOW level input voltage all
other inputs
HIGH level input voltage
all other inputs
input leakage current
input capacitance
input capacitance all other
inputs
0.5
+0.3V
DDD
V
V
IH
0.7V
DDD
V
DDD
+ 0.5
V
V
IL(xtal)
0.3
+0.8
V
V
IH(xtal)
2.0
V
DDD
+ 0.3
V
V
ILn
0.3
+0.8
V
V
IHn
2.0
5.5
V
I
LI
C
i
C
i(n)
1
8
5
μ
A
pF
pF
outputs at 3-state
Digital outputs
V
OL(SCL,SDA)
LOW level output voltage
pins SDA and SCL
LOW level output voltage
HIGH level output voltage
LOW level output voltage
for clocks
HIGH level output voltage
for clocks
output leakage current
SDA/SCL at 3 mA (6 mA)
sink current
V
DDD
= max; I
OL
= 2 mA
V
DDD
= min, I
OH
=
2 mA
0.4 (0.6)
V
V
OL
V
OH
V
OL(clk)
0
2.4
0.5
0.4
V
DDD
+ 0.5
+0.6
V
V
V
V
OH(clk)
2.4
V
DDD
+ 0.5
V
I
LO
at 3-state mode
10
μ
A
FEI input timing
t
SU;DAT
t
HD;DAT
input data set-up time
input data hold time
13
3
ns
ns
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
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