2004 Mar 04
65
Philips Semiconductors
Product specification
Digital video encoder
SAA7104H; SAA7105H
12.1
Reconstruction filter
Figure 17 shows a possible reconstruction filter for the
digital-to-analog converters. Due to its cut-off frequency of
~
6 MHz, it is not suitable for HDTV applications.
12.2
Analog output voltages
The analog output voltages are dependent on the total
load (typical value 37.5
), the digital gain parameters and
theI
2
C-bus settingsof the DACreference currents (analog
settings).
The digital output signals in front of the DACs under
nominal (nominal here stands for the settings given in
Tables 40 to 47 for example a standard PAL or NTSC
signal) conditions occupy different conversion ranges, as
indicated in Table 116 for a
100
100
colour bar signal.
By setting the reference currents of the DACs as shown in
Table 116, standard compliant amplitudes can be
achieved for all signal combinations; it is assumed that in
subaddress 16H, parameter DACF = 0000b, that means
the fine adjustment for all DACs in common is set to 0%.
If S-video output is desired, the adjustment for the C
(chrominance subcarrier) output should be identical to the
one for VBS (luminance plus sync) output.
Table 116
Digital output signals conversion range
SET/OUT
CVBS, SYNC TIP-TO-WHITE
VBS, SYNC TIP-TO-WHITE
RGB, BLACK-TO-WHITE
Digital settings
Digital output
Analog settings
Analog output
see Tables 40 to 47
1014
e.g. B DAC = 1FH
1.23 V (p-p)
see Tables 40 to 47
881
e.g. G DAC = 1BH
1.00 V (p-p)
see Table 35
876
e.g. R DAC = G DAC = B DAC = 0BH
0.70 V (p-p)
12.3
Suggestions for a board layout
Use separate ground planes for analog and digital ground.
Connect these planes only at one point directly under the
device, by using a 0
resistor directly at the supply stage.
Use separate supply lines for analog and digital supply.
Place the supply decoupling capacitors close to the supply
pins.
Use L
bead
(ferrite coil) in each digital supply line close to
the decoupling capacitors to minimize radiation energy
(EMC).
Place the analog coupling (clamp) capacitors close to the
analog input pins. Place the analog termination resistors
close to the coupling capacitors.
Be careful of hidden layout capacitors around the crystal
application.
Use serial resistors in clock, sync and data lines, to avoid
clock or data reflection effects and to soften data energy.