2000 Feb 23
31
Philips Semiconductors
Preliminary specification
TV microcontrollers with Closed Captioning (CC)
and On-Screen Display (OSD)
SAA55xx
9.3
Standby mode
When Standby mode is entered both Acquisition and
Display sections are disabled. The following functions
remain active:
80C51 core
Memory interface
I
2
C-bus interface
Timer/Counters
Watchdog Timer
Software ADC
Pulse Width Modulators
To enter Standby mode, the STANDBY control bit in the
ROMBK SFR (bit 7) must be set. It can be used in
conjunction with either Idle or Power-down modes to
switch between power saving modes. This mode enables
the 80C51 core to decode either IR remote commands or
receive I
2
C-bus commands without the device being fully
powered.
The Standby state is maintained upon exit from either the
Idle mode or Power-down mode. No wake-up from
Standby is necessary as the 80C51 core remains
operational.
Since the output values on RGB and VDS are maintained
the display output must be disabled before entering this
mode.
10 I/O FACILITY
10.1
I/O ports
The SAA55xx devices have 29 I/O lines, each is
individually addressable, or form 3 parallel 8-bit
addressable ports which are Port 0, Port 1 and Port 2.
Port 3 has 5-bit parallel I/Os only.
10.2
Port type
All individual ports can be programmed to function in one
of four I/O configurations: open-drain, quasi-bidirectional,
high-impedance and push-pull. The I/O configuration is
selected using two associated Port Configuration
Registers: PnCFGA and PnCFGB (where n = port number
0, 1, 2 or 3); see Table 3.
10.2.1
O
PEN
-
DRAIN
The open-drain configuration can be used for bidirectional
operation of a port. It requires an external pull-up resistor,
the pull-up voltage has a maximum value of 5.5 V, to allow
connection of the device into a 5 V environment.
Note that the I
2
C-bus ports (P1.4, P1.5, P1.6 and P1.7)
can only be configured as open-drain.
10.2.2
Q
UASI
-
BIDIRECTIONAL
The quasi-bidirectional configuration is a combination of
open-drain and push-pull. It requires an external pull-up
resistor to V
DDP
(nominally 3.3 V). When a signaltransition
from LOW-to-HIGH is output from the device, the pad is
put into push-pull configuration for one clock cycle
(166 ns) after which the pad goes into open-drain
configuration. This configuration is used to speed up the
edges of signal transitions. This is the default state of
operation of the pads after reset.
10.2.3
H
IGH
-
IMPEDANCE
The high-impedance configuration can be used for input
only operation of the port. When using this configuration
the two output transistors are turned off.
10.2.4
P
USH
-
PULL
The push-pull configuration can be used for output only.
In this configuration the signal is driven to either 0 V or
V
DDP
, which is nominally 3.3 V.
10.3
Port alternative functions
Ports 1, 2 and 3 are shared with alternative functions to
enable control of external devices and circuitry.
The alternative functions are enabled by setting the
appropriate SFR and also writing a logic 1 to the port bit
that the function occupies.
10.4
LED support
Port pins P0.5 and P0.6 have a 8 mA current sinking
capability to enable LEDs in series with current limiting
resistors to be driven directly, without the need for
additional buffering circuitry.