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參數(shù)資料
| 型號： | SAA5296PS/NNN |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 12 MHz, MICROCONTROLLER, PDIP52 |
| 封裝： | 0.600 INCH, PLASTIC, SDIP-52 |
| 文件頁數(shù)： | 2/72頁 |
| 文件大?。?/td> | 498K |
| 代理商： | SAA5296PS/NNN |
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1998 Dec 14
10
Philips Semiconductors
Preliminary specication
Economy teletext and TV microcontrollers
SAA5x9x family
RGBREF
31
39
DC input voltage to dene the output HIGH level on the RGB pins.
B
32
40
Pixel rate output of the BLUE colour information.
G
33
41
Pixel rate output of the GREEN colour information.
R
34
42
Pixel rate output of the RED colour information.
VDS
35
43
Video/data switch push-pull output for dot rate fast blanking.
HSYNC
36
45
Schmitt trigger input for a TTL level version of the horizontal sync pulse; the
polarity of this pulse is programmable by register bit TXT1.H POLARITY.
VSYNC
37
47
Schmitt trigger input for a TTL level version of the vertical sync pulse;
the polarity of this pulse is programmable by register bit TXT1.V POLARITY.
VDDA
38
49
+5 V analog power supply.
VDDT
39
51
+5 V teletext power supply.
OSCGND
40
56
Crystal oscillator ground.
XTALIN
41
57
12 MHz crystal oscillator input.
XTALOUT
42
58
12 MHz crystal oscillator output.
RESET
43
59
For a recommended reset circuit refer to the application diagram shown in
Fig.29.
VDDM
44
62
+5 V microcontroller power supply.
P1.0/INT1
45
63
Port 1: 8-bit open-drain bidirectional port with alternate functions.
P1.0/INT1 is external interrupt 1 which can be triggered on the rising and
falling edge of the pulse.
P1.1/T0 is the counter/timer 0.
P1.2/INT0 is external interrupt 0.
P1.3/T1 is the counter/timer 1.
P1.6/SCL is the serial clock input for the I2C-bus.
P1.7/SDA is the serial data port for the I2C-bus.
P1.1/T0
46
64
P1.2/INT0
47
60
P1.3/T1
48
61
P1.6/SCL
49
65
P1.7/SDA
50
66
P1.4
51
67
P1.5
52
68
REF+
50
Positive reference voltage for software driven ADC.
REF
19
Negative reference voltage for software driven ADC.
RD
10
Read control signal to external Data Memory.
WR
11
Write control signal to external Data Memory.
PSEN
17
Enable signal for external Program Memory.
ALE
18
External latch enable signal; active HIGH.
EA
13
Control signal used to select external (LOW) or internal (HIGH) Program
Memory.
AD0 to AD7
69 to 76
Address lines A0 to A7 multiplexed with data lines D0 to D7.
A8 to A15
55 to 52,
35 to 32
Address lines A8 to A15.
SYMBOL
PIN
DESCRIPTION
SDIP52
QFP80
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| SAA5532PS/NNNN | 8-BIT, OTPROM, 12 MHz, MICROCONTROLLER, PDIP52 |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SAA5296XP/NV | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Teletext Circuit |
| SAA5296ZP/NNN | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Teletext Circuit |
| SAA5297 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Economy teletext and TV microcontrollers |
| SAA5297A | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Economy teletext and TV microcontrollers |
| SAA5297AH | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Economy teletext and TV microcontrollers |
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