1998 Dec 14
65
Philips Semiconductors
Preliminary specification
Economy teletext and TV microcontrollers
SAA5x9x family
16 EMC GUIDELINES
Optimization of circuit return paths and minimization of
common mode noise will be assisted by using a
double-sided PCB with a low induction ground plane.
On a single-sided PCB a local ground plane under the
whole IC should be present, as shown in Fig.30. This
should be connected by the widest possible connection
back to the PCB ground connection and bulk electrolytic
decoupling capacitor. It should preferably not connect to
other grounds on the way and no wire links should be
present in this connection. The use of wire links increases
ground bounce by introducing inductance into the ground.
The supply pins can be decoupled at the pin to the ground
plane under the IC. This is easily accomplished using
surface mount capacitors, which are more effective than
leaded components at high frequency. Using a device
socket will unfortunately add to the area and inductance of
the external bypass loop.
A ferrite bead or inductor with resistive characteristics at
high frequency may be utilized in the supply line close to
the decoupling capacitor to provide a high impedance.
To prevent pollution by conduction onto signal lines (which
then may radiate), signals connected to the +5 V supply
via a pull-up resistor should not be connected to the IC
side of the ferrite component.
OSCGND should connected only to the crystal load
capacitors and not the local or circuit GND.
Keep physical connection distances to associated active
devices short.
Route output traces with close proximity mutually coupled
ground return paths.
Fig.30 Power supply and GND connections for SOT247-1.
handbook, full pagewidth
electrolytic decoupling capacitor (2.2
μ
F)
wire links
SM decoupling capacitors (22 to 100 nF)
VDDA
under-IC GND plane
IC (SAA5290)
MGL127
VSSD
VSSA
VDDM
VDDT
GND
+
5 V
other
GND
connections
under-IC GND plane
GND connection
note: no wire links