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參數(shù)資料
| 型號(hào)： | SAA5252 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | Line twenty-one acquisition and display LITOD |
| 中文描述： | 線21采集和顯示LITOD |
| 文件頁數(shù)： | 15/20頁 |
| 文件大小： | 203K |
| 代理商： | SAA5252 |
1996 Jul 18
15
Philips Semiconductors
Product specification
Line twenty-one acquisition and display (LITOD)
SAA5252
Interface to microcontroller using I
2
C-bus
The interface to the microcontroller is via the two-wire
serial I
2
C-bus, and optionally by a Data-Ready signal
(DR). On power up the microcontroller initializes the
device by an I
2
C-bus WRITE to Registers 0
(Control Byte 1). The I
2
C-bus subaddress is then auto
incremented to point to Register 1 (Control Byte 2). These
two registers configure the device to the users
requirements.
If the device is to be used for data acquisition only, then
there are three methods by which the microcontroller can
be informed of the arrival of valid Line 21 data:
It can poll the DR pin, if the function has been enabled,
and wait for it to go LOW.
It can use the negative edge of the DR signal to cause
an interrupt.
It can poll the Data Ready bit (bit D0 of the status byte,
I
2
C-bus READ Register 0).
When valid data is detected, the microcontroller must
initiate an I
2
C-bus READ of Registers 80H, 81H and 82H.
The first and second data bytes from the most recently
received Line 21 are in Register 81H and Register 82H
respectively.
The DR pin, and the Data Ready bit (Status bit D0) will be
cleared after any register has been read. POR is reset
after Register 80H has been read.
‘STAND-ALONE’ (NON I
2
C-BUS) OPERATION
To set the SAA5252 for ‘stand-alone’ operation pin 2
(I
2
C/DC) is tied LOW. This will change the operation of the
SCL, SDA and DR pins to mode select inputs which will
select as shown in Table 13.
In the caption mode the SAA5252 operates in the basic
Normal character/Black background mode. This complies
with the FCC ruling. In the Enhanced caption mode the
set-up will be Shadowed character/Video background.
SDA and SCL in the ‘stand-alone’ operation act as bits M0
and M1 in Table 8.
Table 13
Stand-alone modes
DR
SCL SDA
MODE OF
OPERATION
CHANNEL
RECEPTION
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
video mode
text mode
normal captions
enhanced captions Channel 1
video mode
text mode
normal captions
enhanced captions Channel 2
Channel 1
Channel 1
Channel 1
Channel 2
Channel 2
Channel 2
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| SAA5252P | Line twenty-one acquisition and display LITOD |
| SAA5252T | Line twenty-one acquisition and display LITOD |
| SAA5254 | Integrated VIP and teletext decoder IVT1.1X |
| SAA5254P | Integrated VIP and teletext decoder IVT1.1X |
| SAA5261 | 10-page intelligent teletext decoders |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SAA5252P | 制造商:NXP Semiconductors 功能描述:TELETEXT DECODER, PDIP24 |
| SAA5252T | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Line twenty-one acquisition and display LITOD |
| SAA5254 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Integrated VIP and teletext decoder IVT1.1X |
| SAA5254GP | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Teletext Circuit |
| SAA5254P | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Integrated VIP and teletext decoder IVT1.1X |
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