參數(shù)資料
型號(hào)： SAA4981
廠商： NXP SEMICONDUCTORS
元件分類： 消費(fèi)家電
英文描述： Monolithic integrated 16 : 9 compressor
中文描述： SPECIALTY CONSUMER CIRCUIT, PDIP24
封裝： 0.600 INCH, PLASTIC, MS-015AD, SOT-101-1, DIP-24
文件頁(yè)數(shù)： 6/20頁(yè)
文件大?。?/td> 131K
代理商： SAA4981
1995 Oct 05
6
Philips Semiconductors
Preliminary specification
Monolithic integrated 16 : 9 compressor
SAA4981
Controller
The controller generates the clocks and the horizontal start
signals for the SC line memories and, also, the control
signals for the output multiplexers. The timing for the start
reading signal for three different screen positions (left,
centre and right) and the control signals for the
multiplexers (C1 and C2) is fixed. For the uncompressed
signals a bypass via the SC line memories and a bypass
not via the SC line memories is available. When the
signals do not pass the line memories, the frequency
response is not affected by the si-function. The
compression and bypass mode via the line memories is
delayed by one line with respect to the bypass mode not
via the line memory.
The 16 : 9 compressor is controlled via the control signals
CTRL1, CTRL2 and CTRL3 (see Table 1). The test input
must be LOW level.
Table 1
Functions of the control signals
Internal post filters
The output signals of the SC line memories have to be
filtered with three 6.7 MHz low-pass filters to eliminate the
high frequencies caused by the time discrete signal
processing. The cut-off frequency of 6.7 MHz is necessary
because, as a result of the
3
4
compression factor, the
frequencies are shifted to a higher frequency band with the
inverse compression factor (e.g. 5 MHz
→
compression
→
6.67 MHz). Due to the common bandwidth requirements
for all three outputs of the SC line memories the same
transfer function for the filters can be used.
Remark: These filters do not provide an si-correction. This
means that an input signal with a frequency of 5 MHz will
be damped by 2.1 dB at the output if the signal passes an
SC line memory.
CTRL1 CTRL2 CTRL3
FUNCTION
LOW
LOW
LOW
bypass (through the line
memories)
compression, left position
compression, centre position
compression, right position
bypass (not through the line
memories)
LOW
HIGH
HIGH
LOW
HIGH
LOW
HIGH
LOW
LOW
LOW
LOW
HIGH
Signals for the side panels
The luminance and chrominance of the side panels is
determined by the external signals YSIDE, BYSIDE and
RYSIDE. This external generated side panel signal can be
referenced to the internal black level reference signal via
the output CLAOUT (pin 5).
Horizontal timing (see Fig.3)
The horizontal timing refers to the positive edge of the
input HREF signal.
The following timing parameters are valid for a horizontal
frequency of 15.625 kHz.
Input clamping typically starts at t
A
= 1.55
μ
s and ends at
t
B
= 3.78
μ
s.
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