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參數(shù)資料
| 型號： | SAA4956TJ |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 存儲器 |
| 英文描述： | 2.9-Mbit field memory with noise reduction |
| 中文描述： | SPECIALTY MEMORY CIRCUIT, PDSO40 |
| 封裝： | PLASTIC, SOJ-40 |
| 文件頁數(shù)： | 17/36頁 |
| 文件大?。?/td> | 243K |
| 代理商： | SAA4956TJ |
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1998 Dec 08
17
Philips Semiconductors
Preliminary specification
2.9-Mbit field memory with noise reduction
SAA4956TJ
10 CHARACTERISTICS
V
DD
= V
DD(O)
= V
DD(P)
= 3.0 to 3.6 V; T
amb
= 0 to 70
°
C; 3 ns input transition times; unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
(1)
MAX.
UNIT
Supply
V
DD
V
DD(O)
V
DD(P)
I
DD(tot)
supply voltage (pin 19)
supply voltage (pin 22)
supply voltage (pin 21)
total supply current
(I
DD(tot)
= I
DD
+ I
DD(O)
+ I
DD(P)
)
3.0
3.0
3.0
3.3
3.3
3.3
27
3.6
3.6
5.5
70
V
V
V
mA
minimum write/read
cycle; outputs
open-circuit
minimum write/read cycle
after 1 RSTW/RSTR
cycle; NREN, WE,
RE and OE = LOW
minimum write/read
cycle; outputs
open-circuit
I
DD
I
DD(std)
operating supply current
stand-by supply current
25
3
60
10
mA
mA
I
DD(O)
supply current
2
10
mA
I
DD(P)
supply current
0
1
mA
Inputs except I
2
C-bus signals (pins 3 to 18, 23 to 26 and 40)
V
IH
V
IL
I
LI
C
i
HIGH-level input voltage
LOW-level input voltage
input leakage current
input capacitance
2.0
0.5
10
V
DD(P)
+ 0.3
+0.8
+10
7
V
V
μ
A
pF
V
i
= 0 V to V
DD(P)
f = 1 MHz; V
i
= 0 V
Inputs of I
2
C-bus signals: SCL (pin 1) and SDA (pin 20);
note 2
V
IH
V
IL
I
LI
C
i
HIGH-level input voltage
LOW-level input voltage
input leakage current
input capacitance
3.0
0.5
10
V
DD(P)
+ 0.5
+1.5
+10
10
V
V
μ
A
pF
V
i
= 0 V to V
DD(P)
f = 1 MHz; V
i
= 0 V
Outputs except I
2
C-bus signal SCL (pins 27 to 38)
V
OH
V
OL
I
LO
C
o
HIGH-level output voltage
LOW-level output voltage
output leakage current
output capacitance
I
OH
=
5 mA
I
OL
= 4.2 mA
2.4
10
0.4
+10
10
V
V
μ
A
pF
f = 1 MHz; V
o
= 0 V
Output of I
2
C-bus signal: SDA (pin 20);
note 2
V
OL
I
LO
C
o
LOW-level output voltage
output leakage current
output capacitance
I
OL
= 4 mA
10
0.4
+10
10
V
μ
A
pF
f = 1 MHz; V
o
= 0 V
Write cycle timing;
note 3
T
cy(SWCK)
SWCK cycle time
NREN = LOW; see Fig.4
NREN = HIGH; see Fig.4
see Fig.4
see Fig.4
26
52
7
7
150
ns
ns
ns
ns
t
W(SWCKH)
t
W(SWCKL)
SWCK HIGH pulse width
SWCK LOW pulse width
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| SAA4960 | Integrated PAL comb filter |
| SAA4963 | Integrated NTSC comb filter |
| SAA4963T | Integrated NTSC comb filter |
| SAA4970T | Economical video processing IC ECOBENDIC |
| SAA4974 | Besic without ADC |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SAA4960 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Integrated PAL comb filter |
| SAA4963 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Integrated NTSC comb filter |
| SAA4963T | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Integrated NTSC comb filter |
| SAA4970T | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Economical video processing IC ECOBENDIC |
| SAA4974 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Besic without ADC |
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