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參數(shù)資料
| 型號： | SAA4955 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | 2.9-Mbit field memory |
| 中文描述： | 2.9兆內(nèi)存領域 |
| 文件頁數(shù)： | 11/28頁 |
| 文件大?。?/td> | 188K |
| 代理商： | SAA4955 |
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1999 Apr 29
11
Philips Semiconductors
Product specification
2.9-Mbit field memory
SAA4955TJ
Notes
1.
Typical values are valid for T
amb
= 25
°
C, V
DD
= V
DD(O)
= V
DD(P)
= 3.3 V, all voltages referenced to GND. See Fig.1
for configuration.
The write cycle timing set-up and hold times are related to V
IL
of the rising edge of SWCK. They are valid for the
specified LOW- and HIGH-level input voltages (V
IL
and V
IH
).
The read cycle timing set-up and hold times are related to V
IL
of the rising edge of SRCK. They are valid for the
specified LOW- and HIGH-level input voltages (V
IL
and V
IH
). The load on each output is a 30 pF capacitor to ground
in parallel with a 218
resistor to 1.31 V.
Disable times specified are from the initiating edge until the output is no longer driven by the memory. Disable times
are measured by observing the output waveforms. Low values of load resistor and capacitor have to be used to
obtain a short time constant.
2.
3.
4.
Read cycle timing;
note 3
t
ACC
t
en(Q)
t
dis(Q)
t
h(Q)
T
cy(SRCK)
t
W(SRCKH)
t
W(SRCKL)
t
su(RSTR)
t
h(RSTR)
t
su(RE)
t
h(RE)
t
W(REL)
t
su(OE)
t
h(OE)
t
W(OEL)
t
t
access time after SRCK
output enable time after SRCK
output disable time after SRCK
output hold time after SRCK
SRCK cycle time
HIGH-level pulse width of SRCK
LOW-level pulse width of SRCK
set-up time RSTR
hold time RSTR
set-up time RE
hold time RE
LOW-level pulse width of RE
set-up time OE
hold time OE
LOW-level pulse width of OE
transition time (rise and fall)
see Fig.10
see Fig.14
note 4; see Fig.14
see Fig.10
see Fig.10
see Fig.10
see Fig.10
see Fig.10
see Fig.10
see Fig.13
see Fig.13
see Fig.13
see Fig.14
see Fig.14
see Fig.14
see Fig.10
3
26
7
7
5
3
5
3
9
5
3
9
3
21
21
12
30
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
PARAMETER
CONDITIONS
MIN.
TYP.
(1)
MAX.
UNIT
相關PDF資料 |
PDF描述 |
|---|---|
| SAA4955TJ | 2.9-Mbit field memory |
| SAA4956TJ | 2.9-Mbit field memory with noise reduction |
| SAA4960 | Integrated PAL comb filter |
| SAA4963 | Integrated NTSC comb filter |
| SAA4963T | Integrated NTSC comb filter |
相關代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SAA4955TJ | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:2.9-Mbit field memory |
| SAA4956TJ | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:2.9-Mbit field memory with noise reduction |
| SAA4960 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Integrated PAL comb filter |
| SAA4963 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Integrated NTSC comb filter |
| SAA4963T | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Integrated NTSC comb filter |
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