參數(shù)資料
型號： SA9024
廠商： NXP SEMICONDUCTORS
元件分類： 通信及網(wǎng)絡(luò)
英文描述： 900 MHz transmit modulator and 1.3 GHz fractional-N synthesizer
中文描述： SPECIALTY TELECOM CIRCUIT, PQFP48
封裝： 7 X 7 MM, 1.40 MM HEIGHT, PLASTIC, SOT-313-2, LQFP-48
文件頁數(shù)： 6/23頁
文件大?。?/td> 151K
代理商： SA9024
Philips Semiconductors
Objective specification
SA9024
900 MHz transmit modulator and 1.3 GHz
fractional–N synthesizer
1997 Aug 01
6
ABSOLUTE MAXIMUM RATINGS
SYMBOL
PARAMETER
VALUE
UNIT
MIN.
MAX.
V
CC
V
IN
P
N
T
JMAX
P
MAX
I
MAX
T
STG
T
o
Supply voltage
-0.3
+4.5
V
Voltage applied to any other pin
-0.3
V
CC
+0.3
980
V
Power dissipation, T
A
= 25
°
C (still air)
Operation junction temperature
mW
TBD
°
C
Power input/output
+10/+14
dBm
DC current into any I/O pin
-10
+10
mA
Storage temperature
–65
+150
°
C
°
C
Operating temperature
-40
+85
DC ELECTRICAL CHARACTERISTICS
V
CC
= +3.75 V; T
A
= 25
°
C; unless otherwise stated.
SYMBO
L
PARAMETER
TEST CONDITIONS
LIMITS
TYP
3.75
2
17
95
UNITS
MIN
3.6
MAX
3.9
V
CC
Power supply range
V
Sleep mode
Standby mode
Operating: full power analog
Operating: full power digital
DUAL
1
quiescent
quiescent
Input logic low
Input logic high
I
CC
Supply current
mA
52
I / I
Q / Q
V
IL
V
IH
T
A
Digital Outputs Lock
V
OL
V
OH
Charge Pump Current Setting Resistor Input; RN, R
Ipeak
RN
External resistor to ground
R
Ipeak
External resistor to ground
V
RN
Regulated voltage
V
Ipeak
Regulated voltage
I
peak
PHSOUT programming
PHS
gain
PHSOUT gain
K
PD phase gain
Charge Pump Outputs (including fractional compensation pump, not PHS) RN = 7.5 k
Charg
OPH
versus expected current.
I
MATCH
Sink to source current matching
Current output variation versus V
PHX
Charge pump off, leakage current
V
PH
Charge pump voltage compliance
3
Charge Pump Outputs (only PHS) R
ipeak
= 4.7 k
Charg
OPH
versus expected current.
I
MATCH
Sink to source current matching
In-phase differential input
Quadrature phase differential input
Clock, Data, Strobe, TX
EN
Clock, data, strobe, TX
EN
Ambient temperature range
V
CC
/2
V
CC
/2
V
V
V
V
°
C
–0.3
0.3
×
V
CC
V
CC
+0.3
+85
0.7
×
V
CC
-40
+25
Output voltage LOW
Output voltage HIGH
I
O
= 2mA
I
O
= -2mA
0 4
0.4
V
V
V
CC
– 0.4
6
7 5
7.5
4.7
1.23
1.3
0.26
24xI
peak
4.33
24
k
k
RN = 7.5 k
R
ipeak
= 4.7 k
R
ipeak
= 4.7 k
R
ipeak
= 4.7 k
V
V
mA
mA
Transmit offset PLL in phase lock
mA/rad
I
15
%
–15
V
PHX =
V
CC
/2
V
PHX
in compliance range
V
PHX
= V
CC
/2
–5
–10
–10
0.7
5
10
10
%
%
nA
V
1
V
CC
– 0.8
I
15
%
–15
V
PHS
= V
CC
/2
–10
10
%
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