參數(shù)資料
型號(hào)： SA900
廠商： NXP Semiconductors N.V.
英文描述： I/Q transmit modulator
中文描述： 的I / Q調(diào)制器傳輸
文件頁(yè)數(shù)： 10/20頁(yè)
文件大?。?/td> 173K
代理商： SA900
Philips Semiconductors
Preliminary specification
SA900
I/Q transmit modulator
1997 Sept 16
10
Table 1.
VGA
VGA Power Control Limits
Min.
Typ.
0
-1
-.63
-1
-.63
-1
-.63
-1
-.63
-1
-.63
-1
-.63
-1
-.63
-6.6
-5
-6.6
-5
-6.6
-5
-6.6
-5
-6.6
-5
-6.6
-5
-6.6
-5
-43.2
-40.4
Max.
0
-.2
-.2
-.2
-.2
-.2
-.2
-.2
-3
-3
-3
-3
-3
-3
-3
-37.2
Relative VGA
0
0
1
2
3
4
5
6
7
15
23
31
39
47
55
0
0
1
2
3
4
5
6
7
15
23
31
39
47
55
63
63
0
1. Guaranteed to be monotonic.
AMPS Mode Operation
The SA900 can be configured to operate in the AMPS mode, where
FM modulation is applied to the SA900’s VCO. For the AMPS
mode, the VCO is configured with the proper synthesizer bandwidth
to allow the application of the AMPS modulation to the VCO varactor
tuned tank circuit. The modulated VCO signal is input into an image
reject mixer along with the TXLO signal, where the upper sideband
is rejected. This single sideband modulated signal then drives the
AMPS output power amplifier. The PA provides +2dBm power level
into 50
, with no external matching components required. The AD
(AMPS/DUAL) and the SE (synthesizer enable) bit control the power
up/down of the AMPS mode function. The transition of the TXEN
signal from low to high turns on the modulator. The falling edge of
TXEN signal disables the synthesizer and the modulator.
Synthesizer Operation
The SA900 synthesizer is comprised of the differential VCO circuit,
with external tank components, the Gilbert cell multiplier phase
detector with programmable charge pump current, crystal oscillator
and programmable prescalers. The charge pump output drives an
external second order loop filter. The output of the loop filter is used
to provide the control voltage to the VCO tuning varactor to
complete the PLL synthesizer. The synthesized VCO output
frequency is mixed with the TXLO signal to generate the transmit LO
from the lower sideband (the difference of the VCO and TXLO
frequencies). The output of VCO is fed to a programmable /N
prescaler with user selectable divides of 6, 7, 8 and 9 (all divides
configured to provide 50% duty cycle). The output of the /N divider
drives the A8/1 prescaler. The A8/1 divide is selected by the AD
control bit (AD=1 for /1, and AD=0 for /8). The output of the divide
A8/1 is fed into one input of the phase detector. The reference input
for the phase comparator is generated from the crystal oscillator
(XO) output from the B8/1 prescaler. The B8/1 divide is selected by
the AD control bit (AD=0 for /8, and AD=1 for /1). The phase
detector compares the prescaled XO reference phase to the VCO
prescaled phase, to generate a charge pump output current
proportional to the phase error. The phase detector, a Gilbert cell
multiplier type, having a linear output from 0 to
π
(
π
/2
±
π
/2). The
charge pump peak output current is programmable from 100
μ
A for
the AMPS mode (AD=0) to a maximum of 6.4mA for the DUAL
mode (AD=1) by way of an external current setting resistor placed
from I
PEAK
to circuit ground. The typical loop filter network is shown
in Figure 5. The charge pump current output is programmed by
AD
0
I
OUT
6
1.25V
R
SET
AD
1
I
OUT
24
1.25V
R
SET
where R
SET
is placed between I
PEAK
and GROUND.
The PLL frequency is determined by
VCO
XO
N
(1)
(1)
where N=6, 7, 8, 9 and A8/1 and B8/1 are controlled by the AD bit
(AD=1 A8/1 and B8/1 are divide by 1, AD=0 A8/1 and B8/1 are
divide 8).
Table 2.
Mnemonics
A0
A1
A2
A3
PC0
PC1
PC2
PC3
PC4
PC5
N0
N1
AD
SE
NA
SM1
SM2
Data Word Format
Bits
1 (MSB)
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24 (LSB)
Function
Address bit 0 (1)
Address bit 1 (0)
Address bit 2 (1)
Address bit 4 (1)
Power control bit 0
Power control bit 1
Power control bit 2
Power control bit 3
Power control bit 4
Power control bit 5
Divide N bit 0
Divide N bit 1
AMPS/DUAL mode select bit
Synthesizer enable bit
NA
Sleep mode 1 control bit
Sleep mode 2 control bit
Divide 3/1 control bit
Divide 2/1 control bit
NA
NA
NA
NA
NA
X
Y
NA
NA
NA
NA
NA
VCO Operation
The VCO is designed to operate from 90MHz to 140MHz. The VCO
tank is configured using a parallel inductor and a dual common
cathode tuning varactor diodes. DC blocking capacitors are used to
isolate the varactor
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