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參數(shù)資料
| 型號(hào)： | SA8026 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | 2.5GHz low voltage fractional-N dual frequency synthesizer |
| 中文描述： | 2.5GHz的低電壓小數(shù)N頻率合成器雙 |
| 文件頁(yè)數(shù)： | 10/18頁(yè) |
| 文件大?。?/td> | 289K |
| 代理商： | SA8026 |
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Philips Semiconductors
Product specification
SA8026
2.5GHz low voltage fractional-N dual frequency
synthesizer
1999 Nov 04
10
Auxiliary Output Charge Pumps
The auxiliary charge pump on pin PHA are driven by the auxiliary phase detector and PHP, PHI are driven by the main phase detector. The
current value is determined by the external resistor attached to pin R
SET
.
Main and auxiliary charge pump currents
CP1
CP0
I
PHA
I
PHP
I
PHP–SU
I
PHI
0
0
1.5xl
SET
3xI
SET
15xl
SET
36xl
SET
0
1
0.5xl
SET
1xl
SET
5xl
SET
12xl
SET
1
0
1.5xl
SET
3xl
SET
15xl
SET
0
1
1
0.5xl
SET
1xl
SET
5xl
SET
0
NOTES
1. I
SET
= V
SET
/R
SET
: bias current for charge pumps.
2. CP1 is used to disable the PHI pump, I
PHP–SU
is the total current at pin PHP during speed up condition.
Lock Detect
The output LOCK maintains a logic ‘1’ when the auxiliary phase
detector ANDed with the main phase detector indicates a lock
condition. The lock condition for the main and auxiliary synthesizers
is defined as a phase difference of less than
frequency at the input REF
in+, –
. One counter can fulfill the lock
condition when the other counter is powered down. Out of lock (logic
’0’) is indicated when both counters are powered down.
1 period of the
Power-down mode
The power-down signal can be either hardware (PON) or software
(PD). The PON signal is exclusively ORed with the PD bits in
B-word. If PON = 0, then the part is powered up when PD = 1. PON
can be used to invert the polarity of the software bit PD. When the
synthesizer is reactivated after power-down, the main and reference
dividers are synchronized to avoid possibility of random phase
errors on power-up.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| SA8026DH | ECONOLINE: RB & RA - Dual Output from a Single Input Rail- Power Sharing on Output- Industry Standard Pinout- 1kVDC & 2kVDC Isolation- Custom Solutions Available- UL94V-0 Package Material- Efficiency to 85% |
| SA8027 | 2.5 GHz low voltage, low power RF fractional-N/IF integer frequency synthesizer |
| SA8027DH | 2.5 GHz low voltage, low power RF fractional-N/IF integer frequency synthesizer |
| SA8027W | 2.5 GHz low voltage, low power RF fractional-N/IF integer frequency synthesizer |
| SA8028 | 2.5 GHz sigma delta fractional-N / 760 MHz IF integer frequency synthesizers |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SA8026DH | 制造商:PHILIPS 制造商全稱(chēng):NXP Semiconductors 功能描述:2.5GHz low voltage fractional-N dual frequency synthesizer |
| SA8027 | 制造商:PHILIPS 制造商全稱(chēng):NXP Semiconductors 功能描述:2.5 GHz low voltage, low power RF fractional-N/IF integer frequency synthesizer |
| SA8027DH | 功能描述:鎖相環(huán) - PLL DUAL FRACTIONAL N SYNTHESIZER RoHS:否 制造商:Silicon Labs 類(lèi)型:PLL Clock Multiplier 電路數(shù)量:1 最大輸入頻率:710 MHz 最小輸入頻率:0.002 MHz 輸出頻率范圍:0.002 MHz to 808 MHz 電源電壓-最大:3.63 V 電源電壓-最小:1.71 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:QFN-36 封裝:Tray |
| SA8027DH,512 | 功能描述:射頻無(wú)線(xiàn)雜項(xiàng) DUAL FRACTIONAL N RoHS:否 制造商:Texas Instruments 工作頻率:112 kHz to 205 kHz 電源電壓-最大:3.6 V 電源電壓-最小:3 V 電源電流:8 mA 最大功率耗散: 工作溫度范圍:- 40 C to + 110 C 封裝 / 箱體:VQFN-48 封裝:Reel |
| SA8027DH,518 | 功能描述:鎖相環(huán) - PLL DUAL FRACTIONAL N RoHS:否 制造商:Silicon Labs 類(lèi)型:PLL Clock Multiplier 電路數(shù)量:1 最大輸入頻率:710 MHz 最小輸入頻率:0.002 MHz 輸出頻率范圍:0.002 MHz to 808 MHz 電源電壓-最大:3.63 V 電源電壓-最小:1.71 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:QFN-36 封裝:Tray |
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