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參數(shù)資料
| 型號： | SA630N |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 運(yùn)動控制電子 |
| 英文描述： | Single pole double throw SPDT switch |
| 中文描述： | 1-CHANNEL, SGL POLE DOUBLE THROW SWITCH, PDIP8 |
| 封裝： | SOT-97, PLASTIC, DIP-8 |
| 文件頁數(shù)： | 3/14頁 |
| 文件大?。?/td> | 282K |
| 代理商： | SA630N |
Philips Semiconductors
Product specification
SA630
Single pole double throw (SPDT) switch
1997 Nov 07
3
EQUIVALENT CIRCUIT
+5V
INPUT
ENCH1
1
2
3
4
5
6
7
8
AC BYPASS
CONTROL
LOGIC
V
DD
50
OUT
1
OUT
2
20k
50
20k
SR00580
Figure 3. Equivalent Circuit
ABSOLUTE MAXIMUM RATINGS
SYMBOL
V
DD
Supply voltage
Power dissipation, T
= 25
o
C (still air)
1
PARAMETER
RATING
-0.5 to +5.5
UNITS
V
P
D
8-Pin Plastic DIP
8-Pin Plastic SO
1160
780
150
+20
mW
mW
°
C
dBm
°
C
T
JMAX
P
MAX
T
STG
Maximum operating junction temperature
Maximum power input/output
Storage temperature range
-65 to +150
NOTES:
1. Maximum dissipation is determined by the operating ambient temperature and the thermal resistance,
θ
JA
:
8-Pin DIP:
θ
JA
= 108
°
C/W
8-Pin SO:
θ
JA
= 158
°
C/W
DC ELECTRICAL CHARACTERISTICS
V
DD
= +5V, T
A
= 25
°
C; unless otherwise stated.
LIMITS
SYMBOL
PARAMETER
TEST CONDITIONS
SA630
UNITS
MIN
TYP
MAX
I
DD
V
T
V
IH
V
IL
I
IL
I
IH
Supply current
40
170
300
μ
A
TTL/CMOS logic threshold voltage
1
1.1
1.25
1.4
V
Logic 1 level
Enable channel 1
2.0
V
DD
0.8
V
Logic 0 level
Enable channel 2
-0.3
V
ENCH1 input current
ENCH1 = 0.4V
-1
0
1
μ
A
μ
A
ENCH1 input current
ENCH1 = 2.4V
-1
0
1
NOTE:
1. The ENCH1 input must be connected to a valid Logic Level for proper operation of the SA630.
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