參數(shù)資料
型號： SA5777AD
廠商： NXP SEMICONDUCTORS
元件分類： 外設及接口
英文描述： Dual air-core gauge driver
中文描述： BUF OR INV BASED PRPHL DRVR, PDSO28
封裝： PLASTIC, SO-28
文件頁數(shù)： 5/12頁
文件大?。?/td> 116K
代理商： SA5777AD
Philips Semiconductors
Product specification
SA5777A
Dual air-core gauge driver
1999 Sep 20
5
DC ELECTRICAL CHARACTERISTICS
V
BB
= 7.5 to 18 V; V
CC
= 4.5 to 5.5 V; T
A
= –40 to +85
°
C.
SYMBOL
PARAMETER
TEST CONDITIONS
LIMITS
TYP
UNIT
MIN
7.5
MAX
18
30
V
BB
Analog supply voltage
V
I
IGN
Analog supply current
V
IGN
= 18 V no load
V
BB
= 18 V with load
R
C1
= R
C2
= R
LMIN
V
CC
= 5.5 V
Data out I
OH
= 800
μ
A
Data out I
OL
= 1.5 mA
ST, I
OL
= 2.5 mA
ST, VO (ST) = V
CC
CS, S
CLK
, DATA
IN
, OE
CS, S
CLK
, DATA
IN
, OE
CS, S
CLK
, DATA
IN
, V
IN
= 0.7 x V
CC
CS, S
CLK
, DATA
IN
, V
IN
= 0.3 x V
CC
R
C1
= R
C2
= R
LMIN
C1+, C1–, C2+, C2–, COM
I
SINK
V
BB
= V
BB (MAX)
V
BB
= V
BB (MIN)
I
SOURCE
V
BB
= V
BB (MAX)
V
BB
= V
BB (MIN)
V
BB
= V
BB (MAX)
L
= R
L (MIN)
T
A
= 85
°
C
T
A
= 25
°
C
T
A
= –40
°
C
IOB (Source or Sink)
R
L
= R
L (MIN)
235
1.0
mA
I
CC
V
OH
V
OL
V
OL
Status
I
OH
Status
V
IH
V
IL
I
IH
I
IL
A
CC
Logic supply current
Output high voltage
Output low voltage
mA
V
CC
– 0.8
0.4
0.8
25
V
V
μ
A
V
V
μ
A
μ
A
Input high voltage
Input low voltage
Input high current
Input low current
Output function accuracy
2
0.7 x V
CC
0.3 x V
CC
1
1
±
1
Degree
I
SD
Output shut-down current
85
43
85
43
500
300
500
300
mA
mA
mA
mA
V
DRIVE
Differential coil drive voltage
1
0.7 x V
BB
0.8 x V
BB
V
R
LMIN
Minimum load resistance
215
171
138
V
BIAS
Bias voltage
3
0.475 x V
BB
0.525 x V
BB
V
NOTE:
1. V
is the maximum voltage that is applied across the coil, it is equal to (C1+) – (C1–) or (C2+) – (C2–).
2. In reference to nominal values in Figure 4. (Based on 7+ bit DAC).
(C
) – (C–)
V
BB
– V
BIAS
3.
Output Angle (0)
tan
–1
AC ELECTRICAL CHARACTERISTICS
V
DD
= 7.5 to 18 V; V
CC
= 4.5 to 5.5 V; T
A
= –40 to +85
°
C
SYMBOL
PARAMETER
TEST CONDITIONS
LIMITS
TYP
UNIT
MIN
MAX
1.60
FS
CLK
TS
CLKH
TS
CLKL
TRO
TFO
TSU
THI
T
CSH
T
CSL
Input frequency
S
CLK
high time
S
CLK
low time
Output rise time DO
Output fall time DO
DI set-up time
DI hold time
Time before first S
CLK
rising edge
Time after last S
CLK
falling edge
MHz
ns
ns
ns
ns
ns
ns
ns
ns
175
175
V
CC
= 5.5 V
0.75 to V
CC
–1.2 V, C
L
= 90 pF
V
CC
–1.2 V to 0.75, C
L
= 90 pF
75
75
75
75
75
75
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