參數(shù)資料
型號(hào)： SA5753DK
廠商： NXP SEMICONDUCTORS
元件分類(lèi)： 通信及網(wǎng)絡(luò)
英文描述： Audio processor - filter and control section
中文描述： SPECIALTY TELECOM CIRCUIT, PDSO20
封裝： 4.40 MM, PLASTIC, SOT-266-1, SSOP-20
文件頁(yè)數(shù)： 8/15頁(yè)
文件大?。?/td> 101K
代理商： SA5753DK
Philips Semiconductors
Product specification
SA5753
Audio processor – filter and control section
1997 Nov 07
8
Mode
F7
F6
quick access
0
quick access
test mode
address mode
0
1
1
Load F5–F0 to R0B5 – R0B0
Load F5-F0 to R1B5 – R1B0
F3–F0 point to register
For test only. DO NOT USE.
Action
0
1
0
1
S
A7 A6 A5 A4 A3 A2 A1 A0
ACK
ACK
S = start, A0 = 0, ACK = acknowledge, P = stop, A7–0 = SA5753 address fixed internally at 1000000.
Access mode is determined by F7, F6.
I
2
C Address and Access
A1b3–0
A2ab4–0 =
A2bb1–0 =
A3b3–0
A4b4–0
A5b2–0
A6b3–0
A7b3–0
HD7–0
LD7–0
NAMPS
VCO
RxM
TxM
RxP
VOX
CTL
HPDN
PWDN, IDLE1, IDLE0 see Table below
=
program bits for gain block A1
program bits for gain block A2a
program bits for gain block A2b
program bits for gain block A3
program bits for gain block A4
program bits for gain block A5
program bits for gain block A6
program bits for gain block A7
high tone DTMF
low tone DTMF
program bit for NAMPS offset
6dB higher TX
OUT
receive mute
transmit mute
receive mute polarity
enable VOX of compandor/expander circuit. This bit appears at the VOX
CTL
pin (Pin 5) of the SA5753.
enable power down of compandor circuit. This bit appears at the HPDN pin (Pin 6) of the SA5753
REG
F3
0
0
0
F2
0
0
0
R0
R1
R2
R3
R4
R5
R6
R7
R8
0
0
0
0
0
1
0
1
1
1
1
0
F7 F6 F5 F4 F3 F2 F1 F0
...
P
All access modes support incremental addressing.
F1
0
0
1
F0
0
1
0
1
0
0
1
1
0
1
0
1
0
1
0
Address
HD7
LD7
A1b3
A6b3
A2ab4
A3b3
VOX
CTL
HD6
LD6
A1b2
A6b2
A2ab3
A3b2
S3
RxM
DTC
HD5
LD5
A1b1
A6b1
A2ab2
A3b1
S5
TxM
S4
HD4
LD4
A1b0
A6b0
A2ab1
A3b0
S6
A2bb1
S8
HD3
LD3
A4b3
NAMPS
A2ab0
A7b3
S11
A2bb0
S13
HD2
LD2
A4b2
VCO
PWDN
A7b2
RxP
S9
S7
HD1
LD1
A4b1
HPDN
IDLE 1
A7b1
TxP
S10
S2
HD0
LD0
A4b0
S12
IDLE 0
A7b0
S1
Address Map
For all bits TRUE = ‘1’
=
=
=
=
=
=
=
=
=
=
=
=
=
=
TxP
DTC
S1
S2
S3
=
=
transmit mute polarity
DTMF continuous
bypass TXBPF
bypass compressor in TX path, inhibit pre-emph input
bypass pre-emp and limiter in Tx path
S4
S5
S6
S7
S8
S9
S10 =
S11 =
=
=
=
=
=
=
enable DTMF to TX path and inhibit PREMP
IN
and S2.
bypass RXBPF
bypass de-emph in RX path
bypass expandor in RX path, inhibit audio input
enable DTMF to RX path and inhibit AUDIO
IN
and S7.
enable SPKR
OUT
enable EAR
bypass TXLPF
=
=
=
S12 =
S13 =
cordless data option established
enable data path
Register Bits
B7
Y
B6
Y
B5
B4
B3
B2
B1
B0
PWDN
1
0
0
0
0
X = don’t care.
IDLE1
X
1
1
0
0
IDLE0
X
0
1
0
1
(PWDN) Complete power down except I
2
C, I/Os high impedance.
(DENA) Low power, I/Os at V
DD
/2, DATA
IN
to TX
OUT
enabled.
(IDLE) Low power, I/Os at V
DD
/2, DATA
IN
to TX
OUT
disabled.
Normal operation.
DATA
IN
to TX
OUT
disabled.
Low Power Modes (R6B0 – R6B2)
Y
Y
Y = ignored in address mode.
SR00667
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