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| 型號： | SA555 |
| 廠商： | NEC Corp. |
| 元件分類： | 定時器 |
| 英文描述： | NONLINEAR MODEL |
| 中文描述： | 非線性模型 |
| 文件頁數(shù)： | 9/15頁 |
| 文件大?。?/td> | 253K |
| 代理商： | SA555 |
NE555, NE555Y, SA555, SE555, SE555C
PRECISION TIMERS
SLFS022 – SEPTEMBER 1973 – REVISED FEBRUARY 1992
9
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
APPLICATION INFORMATION
monostable operation
For monostable operation, any of these timers may be connected as shown in Figure 9. If the output is low,
application of a negative-going pulse to TRIG sets the flip-flop (Q goes low), drives the output high, and turns
off Q1. Capacitor C is then charged through R
A
until the voltage across the capacitor reaches the threshold
voltage of THRES input. If TRIG has returned to a high level, the output of the threshold comparator will reset
the flip-flop (Q goes high), drive the output low, and discharge C through Q1.
VCC
(5 V to 15 V)
RA
RL
Output
GND
1
OUT
VCC
CONT
DISCH
THRES
TRIG
Input
7
5
8
6
2
3
Pin numbers shown are for the D, JG, and P packages.
Figure 9. Circuit for Monostable Operation
V
Time – 0.1 ms/div
Capacitor Voltage
Output Voltage
Input Voltage
CL
= 0.01
μ
F
See Figure 9
Figure 10. Typical Monostable Waveforms
Monostable operation is initiated when TRIG
voltage falls below the trigger threshold. Once
initiated, the sequence ends only if TRIG is high
at the end of the timing interval. Because of the
threshold level and saturation voltage of Q1,
the output pulse duration is approximately
t
w
= 1.1R
A
C. Figure 11 is a plot of the time
constant for various values of R
A
and C. The
threshold levels and charge rates are both directly
proportional to the supply voltage, V
CC.
The timing
interval is therefore independent of the supply
voltage, so long as the supply voltage is constant
during the time interval.
Applying a negative-going trigger pulse simulta-
neously to RESET and TRIG during the timing
interval discharges C and re-initiates the cycle,
commencing on the positive edge of the reset
pulse. The output is held low as long as the reset
pulse is low. To prevent false triggering, when
RESET is not used, it should be connected to V
CC
.
–
C – Capacitance –
μ
F
10
1
10–1
10–2
10–3
10–4
100
10
1
0.1
0.01
10–5
0.001
t
RA = 10 M
RA = 10 k
RA = 1 k
RA = 100 k
RA = 1 M
Figure 11. Output Pulse Duration vs Capacitance
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