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    參數(shù)資料
    型號(hào): SA532
    廠(chǎng)商: NXP Semiconductors N.V.
    英文描述: Low power dual operational amplifi
    中文描述: 低功耗雙運(yùn)算擴(kuò)增
    文件頁(yè)數(shù): 2/12頁(yè)
    文件大小: 128K
    代理商: SA532
    Philips Semiconductors
    Product data
    NE/SA/SE532/
    LM258/358/A/2904
    Low power dual operational amplifiers
    2
    2002 Jul 12
    853-1241 28616
    DESCRIPTION
    The 532/358/LM2904 consists of two independent, high gain,
    internally frequency-compensated operational amplifiers internally
    frequency-compensated operational amplifiers designed specifically
    to operate from a single power supply over a wide range of voltages.
    Operation from dual power supplies is also possible, and the low
    power supply current drain is independent of the magnitude of the
    power supply voltage.
    UNIQUE FEATURES
    In the linear mode the input common-mode voltage range includes
    ground and the output voltage can also swing to includes ground
    and the output voltage can also swing to ground, even though
    operated from only a single power supply voltage. The unity gain
    cross frequency is temperature-compensated. The input bias current
    is also temperature-compensated.
    FEATURES
    Internally frequency-compensated for unity gain
    Large DC voltage gain: 100 dB
    Wide bandwidth (unity gain): 1 MHz (temperature-compensated)
    Wide power supply range single supply: 3 V
    DC
    to 30 V
    DC
    ,
    or dual supplies:
    ±
    1.5 V
    DC
    to
    ±
    15 V
    DC
    Very low supply current drain (400
    μ
    A)—essentially independent
    of supply voltage (1 mW/op amp at +5 V
    DC
    )
    Low input biasing current: 45 nA
    DC
    temperature-compensated
    Low input offset voltage: 2 mV
    DC
    , and offset current: 5nA
    DC
    Differential input voltage range equal to the power supply voltage
    Large output voltage: 0 V
    DC
    to V+ 1.5 V
    DC
    swing
    PIN CONFIGURATION
    1
    2
    3
    4
    5
    6
    7
    8
    – +
    B
    A
    V+
    OUTPUT B
    INVERTING INPUT B
    NON INVERTING INPUT B
    OUTPUT A
    INVERTING INPUT A
    NON INVERTING INPUT A
    V–
    D, DP, and N Packages
    SL00282
    Figure 1. Pin configuration.
    EQUIVALENT CIRCUIT
    V+
    6
    μ
    A
    100
    μ
    A
    Q2
    Q3
    Q1
    Q4
    INPUTS
    +
    Q8
    Q9
    C
    C
    Q10
    6
    μ
    A
    Q5
    Q7
    Q6
    R
    SC
    OUTPUT
    Q13
    Q12
    Q11
    50
    μ
    A
    SL00283
    Figure 2. Equivalent circuit.
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