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參數(shù)資料
| 型號： | S9S08MP16E2VLF |
| 廠商： | FREESCALE SEMICONDUCTOR INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, FLASH, 50.33 MHz, MICROCONTROLLER, PQFP48 |
| 封裝： | QFP-48 |
| 文件頁數(shù)： | 21/36頁 |
| 文件大?。?/td> | 762K |
| 代理商： | S9S08MP16E2VLF |
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MC9S08MP16 Series Data Sheet, Rev. 2
Electrical Characteristics
Freescale Semiconductor
28
Figure 17. Reset Timing
Figure 18. KBIxPn Timing
2.14.2
FTM Module Timing
Synchronizer circuits determine the shortest input pulses that can be recognized or the fastest clock that can be used as the
optional external source to the FTM timer counter. These synchronizers operate from the current ICSOUT clock. The ICSOUT
clock period = 0.5
tcyc = 1/(fBus 2).
7
D
Keyboard interrupt pulse width
Asynchronous path4
Synchronous path5
tILIH, tIHIL
100
1.5 x tcyc
—
ns
8
C
Port rise and fall time —
Low output drive (PTxDS = 0) (load = 50 pF)6
Slew rate control disabled (PTxSE = 0)
Slew rate control enabled (PTxSE = 1)
tRise, tFall
—
40
75
—
ns
Port rise and fall time —
High output drive (PTxDS = 1) (load = 50 pF)6
Slew rate control disabled (PTxSE = 0)
Slew rate control enabled (PTxSE = 1)
tRise, tFall
—
11
35
—
ns
1 Typical values are based on characterization data at V
DD = 5.0V, 25C unless otherwise stated.
2 This is the shortest pulse that is guaranteed to be recognized as a reset pin request.
3 To enter BDM mode following a POR, BKGD/MS should be held low during the power-up and for a hold time of t
MSH after VDD rises
above VLVD.
4 This is the minimum pulse width that is guaranteed to be recognized as a keyboard interrupt request in stop mode.
5 This is the minimum pulse width that is guaranteed to pass through the pin synchronization circuitry. Shorter pulses may or may not
be recognized. In stop mode, the synchronizer is bypassed so shorter pulses can be recognized in that case.
6 Timing is shown with respect to 20% V
DD and 80% VDD levels. Temperature range –40C to 125C.
Table 17. FTM Input Timing
No.
C
Function
Symbol
Min
Max
Unit
1
D
External clock frequency
fTCLK
0fICSOUT/4
1
Hz
2
D
External clock period
tTCLK
2—
tcyc
3
D
External clock high time
tclkh
0.75
—
tcyc
Table 16. Control Timing (continued)
Num
C
Rating
Symbol
Min
Typ1
Max
Unit
textrst
RESET PIN
tIHIL
KBIxPn
tILIH
KBIxPn
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| S9S08MP16E2VWL | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:8-Bit HCS08 Central Processor Unit (CPU) |
| S9S08QD2 | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:HCS08 Microcontrollers |
| S9S08QD2CPC | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:HCS08 Microcontrollers |
| S9S08QD2CSC | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:HCS08 Microcontrollers |
| S9S08QD2J1CSC | 制造商:Freescale Semiconductor 功能描述:MCU 8BIT HCS08 CISC 2KB FLASH 3.3V/5V 8SOIC N - Bulk |
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