參數(shù)資料
型號(hào): S87C654-4F40
廠商: NXP SEMICONDUCTORS
元件分類: 微控制器/微處理器
英文描述: CMOS single-chip 8-bit microcontroller
中文描述: 8-BIT, UVPROM, 8 MHz, MICROCONTROLLER, CDIP40
文件頁數(shù): 20/28頁
文件大?。?/td> 480K
代理商: S87C654-4F40
Philips Semiconductors
Product specification
87C654
CMOS single-chip 8-bit microcontroller
1996 Aug 16
20
EPROM CHARACTERISTICS
The 87C654 is programmed by using a
modified Quick-Pulse Programming
algorithm. It differs from older methods in the
value used for V
PP
(programming supply
voltage) and in the width and number of the
ALE/PROG pulses.
The 87C654 contains two signature bytes
that can be read and used by an EPROM
programming system to identify the device.
The signature bytes identify the device as an
87C654 manufactured by Philips
Components.
Table 4 shows the logic levels for reading the
signature byte, and for programming the
program memory, the encryption table, and
the lock bits. The circuit configuration and
waveforms for quick-pulse programming are
shown in Figures 12 and 13. Figure 14 shows
the circuit configuration for normal program
memory verification.
Quick-Pulse Programming
The setup for microcontroller quick-pulse
programming is shown in Figure 12. Note that
the 87C654 is running with a 4 to 6MHz
oscillator. The reason the oscillator needs to
be running is that the device is executing
internal address and program data transfers.
The address of the EPROM location to be
programmed is applied to ports 1 and 2, as
shown in Figure 12. The code byte to be
programmed into that location is applied to
port 0. RST, PSEN and pins of ports 2 and 3
specified in Table 4 are held at the ‘Program
Code Data’ levels indicated in Table 4. The
ALE/PROG is pulsed low 25 times as shown
in Figure 13.
To program the encryption table, repeat the
25 pulse programming sequence for
addresses 0 through 1FH, using the ‘Pgm
Encryption Table’ levels. Do not forget that
after the encryption table is programmed,
verification cycles will produce only encrypted
data.
To program the lock bits, repeat the 25 pulse
programming sequence using the ‘Pgm Lock
Bit’ levels. After one lock bit is programmed,
further programming of the code memory and
encryption table is disabled. However, the
other lock bit can still be programmed.
Note that the EA/V
PP
pin must not be allowed
to go above the maximum specified V
PP
level
for any amount of time. Even a narrow glitch
above that voltage can cause permanent
damage to the device. The V
PP
source
should be well regulated and free of glitches
and overshoot.
Program Verification
If lock bit 2 has not been programmed, the
on-chip program memory can be read out for
program verification. The address of the
program memory locations to be read is
applied to ports 1 and 2 as shown in
Figure 14. The other pins are held at the
‘Verify Code Data’ levels indicated in Table 4.
The contents of the address location will be
emitted on port 0. External pull-ups are
required on port 0 for this operation.
If the encryption table has been programmed,
the data presented at port 0 will be the
exclusive NOR of the program byte with one
of the encryption bytes. The user will have to
know the encryption table contents in order to
correctly decode the verification data. The
encryption table itself cannot be read out.
Reading the Signature Bytes
The signature bytes are read by the same
procedure as a normal verification of
locations 030H and 031H, except that P3.6
and P3.7 need to be pulled to a logic low. The
values are:
(030H) =
15H indicates manufactured by
Philips
(031H) =
99H indicates 87C654
Program/Verify Algorithms
Any algorithm in agreement with the
conditions listed in Table 4, and which
satisfies the timing specifications, is suitable.
Erasure Characteristics
Erasure of the EPROM begins to occur when
the chip is exposed to light with wavelengths
shorter than approximately 4,000 angstroms.
Since sunlight and fluorescent lighting have
wavelengths in this range, exposure to these
light sources over an extended time (about 1
week in sunlight, or 3 years in room level
fluorescent lighting) could cause inadvertent
erasure.
For this and secondary effects, it
is recommended that an opaque label be
placed over the window.
For elevated
temperature or environments where solvents
are being used, apply Kapton tape Fluorglas
part number 2345–5, or equivalent.
The recommended erasure procedure is
exposure to ultraviolet light (at 2537
angstroms) to an integrated dose of at least
15W-sec/cm
2
. Exposing the EPROM to an
ultraviolet lamp of 12,000
μ
W/cm
2
rating for
20 to 39 minutes, at a distance of about 1
inch, should be sufficient. Erasure leaves the
array in an all 1s state.
Table 4. EPROM Programming Modes
MODE
RST
PSEN
ALE/PROG
EA/V
PP
1
P2.7
P2.6
P3.7
P3.6
Read signature
1
0
1
0
0
0
0
Program code data
1
0
0*
V
PP
1
1
0
1
1
Verify code data
1
0
1
0
0
1
1
Pgm encryption table
1
0
0*
V
PP
V
PP
V
PP
1
0
1
0
Pgm lock bit 1
1
0
0*
1
1
1
1
Pgm lock bit 2
NOTES:
1. ‘0’ = Valid low for that pin, ‘1’ = valid high for that pin.
2. V
PP
= 12.75V
±
0.25V.
3. V
CC
= 5V
±
10% during programming and verification.
*
ALE/PROG receives 25 programming pulses while V
PP
is held at 12.75V. Each programming pulse is low for 100
μ
s (
±
10
μ
s) and high for a
minimum of 10
μ
s.
1
0
0*
1
1
0
0
Trademark phrase of Intel Corporation.
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