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參數(shù)資料
| 型號： | S87C552-5A68 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | Single-chip 8-bit microcontroller |
| 中文描述： | 8-BIT, OTPROM, 16 MHz, MICROCONTROLLER, PQCC68 |
| 封裝： | PLASTIC, MO-047AE, SOT-188-3, LCC-68 |
| 文件頁數(shù)： | 13/24頁 |
| 文件大?。?/td> | 188K |
| 代理商： | S87C552-5A68 |
Philips Semiconductors
Product specification
80C552/83C552
Single-chip 8-bit microcontroller
1998 Aug 13
13
AC ELECTRICAL CHARACTERISTICS
1, 2
16 MHz version
16MHz CLOCK
MIN
VARIABLE CLOCK
MIN
3.5
SYMBOL
1/t
CLCL
t
LHLL
t
AVLL
t
LLAX
t
LLIV
t
LLPL
t
PLPH
t
PLIV
t
PXIX
t
PXIZ
t
AVIV
t
PLAZ
Data Memory
t
RLRH
t
WLWH
t
RLDV
t
RHDX
t
RHDZ
t
LLDV
t
AVDV
t
LLWL
t
AVWL
t
QVWX
t
DW
t
WHQX
t
RLAZ
t
WHLH
External Clock
t
CHCX
t
CLCX
t
CLCH
t
CHCL
Serial Timing – Shift Register Mode
4
(Test Conditions: T
amb
= 0
°
C to +70
°
C; V
SS
= 0V; Load Capacitance = 80pF)
t
XLXL
6
Serial port clock cycle time
t
QVXH
6
Output data setup to clock rising edge
t
XHQX
6
Output data hold after clock rising edge
t
XHDX
6
Input data hold after clock rising edge
t
XHDV
6
Clock rising edge to input data valid
NOTES:
1. Parameters are valid over operating temperature range unless otherwise specified.
2. Load capacitance for port 0, ALE, and PSEN = 100pF, load capacitance for all other outputs = 80pF.
3. t
CLCL
= 1/f
= one oscillator clock period.
t
CLCL
= 83.3ns at f
OSC
= 12MHz.
t
= 62.5ns at f
= 16MHz.
4. These values are characterized but not 100% production tested.
FIGURE
2
PARAMETER
MAX
MAX
16
UNIT
MHz
Oscillator frequency
2
ALE pulse width
85
2t
CLCL
–40
t
CLCL
–55
t
CLCL
–35
ns
2
Address valid to ALE low
8
ns
2
Address hold after ALE low
28
ns
2
ALE low to valid instruction in
150
4t
CLCL
–100
ns
2
ALE low to PSEN low
23
t
CLCL
–40
3t
CLCL
–45
ns
2
PSEN pulse width
143
ns
2
PSEN low to valid instruction in
83
3t
CLCL
–105
ns
2
Input instruction hold after PSEN
0
0
ns
2
Input instruction float after PSEN
38
t
CLCL
–25
5t
CLCL
–105
10
ns
2
Address to valid instruction in
208
ns
2
PSEN low to address float
10
ns
3
RD pulse width
275
6t
CLCL
–100
6t
CLCL
–100
ns
4
WR pulse width
275
ns
3
RD low to valid data in
148
5t
CLCL
–165
ns
3
Data hold after RD
0
0
ns
3
Data float after RD
55
2t
CLCL
–70
8t
CLCL
–150
9t
CLCL
–165
3t
CLCL
+50
ns
3
ALE low to valid data in
350
ns
3
Address to valid data in
398
ns
3, 4
ALE low to RD or WR low
138
238
3t
CLCL
–50
4t
CLCL
–130
t
CLCL
–60
7t
CLCL
–150
t
CLCL
–50
ns
3, 4
Address valid to WR low or RD low
120
ns
4
Data valid to WR transition
3
ns
4
Data before WR
288
ns
4
Data hold after WR
13
ns
3
RD low to address float
0
0
ns
3, 4
RD or WR high to ALE high
23
103
t
CLCL
–40
t
CLCL
+40
ns
5
High time
4
Low time
4
Rise time
4
Fall time
4
20
20
ns
5
20
20
ns
5
20
20
ns
5
20
20
ns
0.75
12t
CLCL
10t
CLCL
–133
2t
CLCL
–117
0
μ
s
ns
492
8
ns
0
ns
492
10t
CLCL
–133
ns
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相關(guān)代理商/技術(shù)參數(shù) |
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| S87C552-5B | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Bit Microcontroller |
| S87C552-5K68 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Single-chip 8-bit microcontroller |
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