參數(shù)資料
型號： S80C652FBAA
廠商： NXP SEMICONDUCTORS
元件分類： 微控制器/微處理器
英文描述： CMOS single-chip 8-bit microcontroller
中文描述： 8-BIT, 16 MHz, MICROCONTROLLER, PQCC44
文件頁數(shù)： 7/28頁
文件大?。?/td> 480K
代理商： S80C652FBAA
Philips Semiconductors
Product specification
87C654
CMOS single-chip 8-bit microcontroller
1996 Aug 16
7
PIN DESCRIPTIONS
PIN NUMBER
MNEMONIC
DIP
LCC
QFP
TYPE
NAME AND FUNCTION
V
SS
V
CC
20
22
16
I
Ground:
0V reference.
40
44
38
I
Power Supply:
This is the power supply voltage for normal, idle, and power-down
operation.
P0.0–0.7
39–32
43–36
37–30
I/O
Port 0:
Port 0 is an open-drain, bidirectional I/O port. Port 0 pins that have 1s written to them
float and can be used as high-impedance inputs. Port 0 is also the multiplexed low-order
address and data bus during accesses to external program and data memory. In this
application, it uses strong internal pull-ups when emitting 1s. Port 0 also outputs the code
bytes during program verification in the 87C654. External pull-ups are required during
program verification.
P1.0–P1.7
1–8
2–9
40–44,
1–3
I/O
Port 1:
Port 1 is an 8-bit bidirectional I/O port with internal pull-ups, except P1.6 and P1.7
which are open drain. Port 1 pins that have 1s written to them are pulled high by the internal
pull-ups and can be used as inputs. As inputs, port 1 pins that are externally pulled low will
source current because of the internal pull-ups. (See DC Electrical Characteristics: I
IL
).
Port 1 also receives the low-order address byte during program memory verification.
Alternate functions include:
SCL:
I
2
C-bus serial port clock line.
SDA:
I
2
C-bus serial port data line.
P1.6
P1.7
7
8
8
9
2
3
I/O
I/O
P2.0–P2.7
21–28
24–31
18–25
I/O
Port 2:
Port 2 is an 8-bit bidirectional I/O port with internal pull-ups. Port 2 pins that have 1s
written to them are pulled high by the internal pull-ups and can be used as inputs. As inputs,
port 2 pins that are externally being pulled low will source current because of the internal
pull-ups. (See DC Electrical Characteristics: I
). Port 2 emits the high-order address byte
during fetches from external program memory and during accesses to external data memory
that use 16-bit addresses (MOVX @DPTR). In this application, it uses strong internal
pull-ups when emitting 1s. During accesses to external data memory that use 8-bit
addresses (MOV @Ri), port 2 emits the contents of the P2 special function register.
P3.0–P3.7
10–17
11,
13–19
5,
7–13
I/O
Port 3:
Port 3 is an 8-bit bidirectional I/O port with internal pull-ups. Port 3 pins that have 1s
written to them are pulled high by the internal pull-ups and can be used as inputs. As inputs,
port 3 pins that are externally being pulled low will source current because of the pull-ups.
(See DC Electrical Characteristics: I
IL
). Port 3 also serves the special features of the 80C51
family, as listed below:
RxD (P3.0):
Serial input port
TxD (P3.1):
Serial output port
INT0 (P3.2):
External interrupt
INT1 (P3.3):
External interrupt
T0 (P3.4):
Timer 0 external input
T1 (P3.5):
Timer 1 external input
WR (P3.6):
External data memory write strobe
RD (P3.7):
External data memory read strobe
10
11
12
13
14
15
16
17
11
13
14
15
16
17
18
19
5
7
8
9
10
11
12
13
I
O
I
I
I
I
O
O
RST
9
10
4
I
Reset:
A high on this pin for two machine cycles while the oscillator is running, resets the
device. An internal diffused resistor to V
SS
permits a power-on reset using only an external
capacitor to V
CC
.
Address Latch Enable/Program Pulse:
Output pulse for latching the low byte of the
address during an access to external memory. In normal operation, ALE is emitted at a
constant rate of 1/6 the oscillator frequency, and can be used for external timing or clocking.
Note that one ALE pulse is skipped during each access to external data memory. This pin is
also the program pulse input (PROG) during EPROM programming.
ALE/PROG
30
33
27
I/O
PSEN
29
32
26
O
Program Store Enable:
The read strobe to external program memory. When the 87C654 is
executing code from the external program memory, PSEN is activated twice each machine
cycle, except that two PSEN activations are skipped during each access to external data
memory. PSEN is not activated during fetches from internal program memory.
EA/V
PP
31
35
29
I
External Access Enable/Programming Supply Voltage:
EA must be externally held low to
enable the device to fetch code from external program memory locations 0000H and 3FFFH.
If EA is held high, the device executes from internal program memory unless the program
counter contains an address greater than 3FFFH. This pin also receives the 12.75V
programming supply voltage (V
PP
) during EPROM programming.
Crystal 1:
Input to the inverting oscillator amplifier and input to the internal clock generator
circuits.
XTAL1
19
21
15
I
XTAL2
NOTE:
To avoid “l(fā)atch-up” effect at power-on, the voltage on any pin at any time must not be higher than V
CC
+ 0.5V or V
SS
– 0.5V, respectively.
18
20
14
O
Crystal 2:
Output from the inverting oscillator amplifier.
相關(guān)PDF資料
PDF描述
S80C652IBBB CMOS single-chip 8-bit microcontroller
S80C652IBPN CMOS single-chip 8-bit microcontroller
S80C652IFPN CMOS single-chip 8-bit microcontroller
S80C652FFAA CMOS single-chip 8-bit microcontroller
S80C652FFBB CMOS single-chip 8-bit microcontroller
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
S80C652FBBB 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:CMOS single-chip 8-bit microcontroller
S80C652FBPN 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:CMOS single-chip 8-bit microcontroller
S80C652FFAA 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:CMOS single-chip 8-bit microcontroller
S80C652FFBB 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:CMOS single-chip 8-bit microcontroller
S80C652FFPN 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:CMOS single-chip 8-bit microcontroller
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺，查看報(bào)價(jià)

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*