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參數(shù)資料
| 型號： | S80C32 |
| 英文描述： | CMOS 0 to 44 MHz Single-chip 8 Bit Microcontroller |
| 中文描述： | 的CMOS 0至44 MHz的單芯片8位微控制器 |
| 文件頁數(shù)： | 5/20頁 |
| 文件大?。?/td> | 229K |
| 代理商： | S80C32 |
80C32/80C52
MATRA MHS
Rev. E (31/08/95)
5
PSEN
Program Store Enable output is the read strobe to external
Program Memory. PSEN is activated twice each machine
cycle during fetches from external Program Memory.
(However, when executing out of external Program
Memory, two activations of PSEN are skipped during
each access to external Data Memory). PSEN is not
activated during fetches from internal Program Memory.
PSEN can sink/source 8 LS TTL inputs. It can drive
CMOS inputs without an external pullup.
EA
When EA is held high, the CPU executes out of internal
Program Memory (unless the Program Counter exceeds
1 FFFH). When EA is held low, the CPU executes only out
of external Program Memory. EA must not be floated.
XTAL1
Input to the inverting amplifier that forms the oscillator.
Receives the external oscillator signal when an external
oscillator is used.
XTAL2
Output of the inverting amplifier that forms the oscillator.
This pin should be floated when an external oscillator is
used.
Idle And Power Down Operation
Figure 3
shows the internal Idle and Power Down clock
configuration. As illustrated, Power Down operation
stops the oscillator. Idle mode operation allows the
interrupt, serial port, and timer blocks to continue to
function, while the clock to the CPU is gated off.
These special modes are activated by software via the
Special Function Register, PCON. Its hardware address is
87H. PCON is not bit addressable.
Figure 3. Idle and Power Down Hardware.
PCON : Power Control Register
(MSB)
(LSB)
SMOD
–
–
–
GF1
GF0
PD
IDL
Symbol
SMOD
Position
PCON.7
Name and Function
Double Baud rate bit. When set to
a 1, the baud rate is doubled when
the serial port is being used in
either modes 1, 2 or 3.
(Reserved)
(Reserved)
(Reserved)
General-purpose flag bit.
General-purpose flag bit.
Power Down bit. Setting this bit
activates power down operation.
Idle mode bit. Setting this bit
activates idle mode operation.
–
–
–
PCON.6
PCON.5
PCON.4
PCON.3
PCON.2
PCON.1
GF1
GF0
PD
IDL
PCON.0
If 1’s are written to PD and IDL at the same time. PD
takes, precedence. The reset value of PCON is
(000X0000).
Idle Mode
The instruction that sets PCON.0 is the last instruction
executed before the Idle mode is activated. Once in the
Idle mode the CPU status is preserved in its entirety : the
Stack Pointer, Program Counter, Program Status Word,
Accumulator, RAM and all other registers maintain their
data during idle.
Table 1
describes the status of the
external pins during Idle mode.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| S-80C32 | 制造商:MATRA HARRIS 功能描述:MICROCONTROLLER 8-BIT |
| S80C32-1 | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:CHMOS SINGLE-CHIP 8-BIT MICROCONTROLLER |
| S80C32-12 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Bit Microcontroller |
| S80C32-12R | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Bit Microcontroller |
| S80C32-16 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Bit Microcontroller |
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